Semiconductor Device Bottom Plate Warpage Compensation

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Solution Overview

Problem

Existing semiconductor device manufacturing methods face challenges with warpage due to thermal expansion coefficient differences between the frame and base, leading to the need for costly planarization processes and unpredictable upper surface deformation after semiconductor substrate joining.

Innovation Solution

A manufacturing method involving a bottom plate with a thicker inside part and thinner outer peripheral part, where a frame member with a smaller linear expansion coefficient is joined to the outer peripheral part, reducing warpage and eliminating the need for planarization by designing recesses on the lower surface to accommodate expected protrusions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If the frame and base have different thermal expansion coefficients and are joined by heating, then the joining strength is improved, but warpage occurs causing the lower surface to become non-flat

Engineering Contradiction:
Improvejoining strengthVSAvoidflatness of lower surface
Core Design Contradiction:
StrengthVSShape

Solution Approach 1:

The patent applies preliminary action by forming a protrusion on the lower surface of the base before the joining process. This protrusion is strategically designed to compensate for the warpage that will occur during heating and joining. When the frame is joined to the base, the expected warpage causes the lower surface to deform, but the pre-formed protrusion ensures that the deformation results in a substantially flat final surface, eliminating the need for post-joining planarization.

Inventive Principle:
Principle #10Preliminary action

2Shape

If polishing is performed to planarize the warped lower surface, then the flatness is improved, but manufacturing cost increases

Engineering Contradiction:
Improveflatness of lower surfaceVSAvoidmanufacturing cost
Core Design Contradiction:
ShapeVSEase of manufacture

Solution Approach 1:

The patent eliminates the need for polishing by performing preliminary action - forming the protrusion on the lower surface before joining. This proactive design approach anticipates the warpage deformation and pre-compensates for it, so that when warpage occurs during joining, the surface automatically becomes substantially flat without requiring any post-processing polishing operations, thereby reducing manufacturing cost.

Inventive Principle:
Principle #10Preliminary action

3Ease of manufacture

If the entire heat radiating component warps during joining, then the joining process is simplified, but the upper surface becomes non-flat affecting subsequent assembly

Engineering Contradiction:
Improvejoining process simplicityVSAvoidflatness of upper surface
Core Design Contradiction:
Ease of manufactureVSShape

Solution Approach 1:

The patent applies local quality by creating a non-uniform thickness distribution in the base, with a thicker inner peripheral portion and a thinner outer peripheral portion. This localized variation in geometry creates a protrusion on the lower surface that strategically compensates for warpage. The local quality modification ensures that while the component can warp during joining, the upper surface remains substantially flat, enabling both simplified joining and subsequent assembly operations.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach minimizes deformation of the upper surface and eliminates the requirement for post-joining planarization, ensuring a flat surface for semiconductor element fixation and efficient heat transfer while reducing manufacturing costs.

Implementation Method 1

In a case where the frame and the base have different thermal expansion coefficients, warpage may occur when the frame is heated and joined to the base using a joining material such as a silver solder material and then cooled

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Data Source

PatentUS11677211B2Semiconductor device, semiconductor device package, and manufacturing methods thereof
Publication Date: 2023.06.13 NICHIA CORP
  • US11677211B2 patent drawing
  • US11677211B2 patent drawing
  • US11677211B2 patent drawing

AI summary

A semiconductor device includes: a bottom plate having an upper surface and a lower surface, wherein the upper surface comprises an outer peripheral part and an inside part that is enclosed by the outer peripheral part and that protrudes more upward than the outer peripheral part; a frame joined to the upper surface of the bottom plate and comprising a first through-hole that penetrates the frame; a plate jointed to the outside or inside surface of the frame, the plate comprising a second through-hole that penetrates the plate in a same direction as that of the first through-hole, a thickness of the plate being greater than a thickness of the frame; a lead terminal inserted into the first through-hole and the second through-hole; a fixing member provided in the second through-hole and fixing the lead terminal; and a semiconductor element fixed to the inside part.