Semiconductor Boundary Bumper Pattern for Strain-Induced Defect Control

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Solution Overview

Problem

As semiconductor devices are scaled down, pattern defects in cell and peripheral active patterns become a significant issue, and the reduction in chip size is hindered by the need for additional dummy patterns to mitigate strain caused by boundary insulating patterns, leading to increased chip size and complexity.

Innovation Solution

Incorporating a bumper pattern with a greater width than the cell active patterns between the boundary insulating pattern and the cell active patterns to absorb strain, thereby preventing pattern defects and reducing the need for additional dummy patterns, thus minimizing chip size.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If additional dummy patterns are added to mitigate strain from boundary insulating patterns, then pattern defects are reduced, but chip size increases

Engineering Contradiction:
Improvepattern defect preventionVSAvoidchip size
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The bumper pattern serves as an intermediary structure positioned between the boundary insulating pattern and the cell active patterns. This mediator absorbs the strain generated by the boundary insulating pattern, preventing it from affecting the cell active patterns. The bumper pattern has a width greater than that of the cell active patterns, providing sufficient buffering capacity to mitigate strain effects without requiring additional dummy patterns, thus reducing overall chip size while maintaining pattern defect prevention.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If transistor size is reduced to increase integration density, then more transistors fit on chip, but pattern defects increase due to scaling effects

Engineering Contradiction:
Improveintegration densityVSAvoidpattern quality
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The semiconductor device structure is segmented into distinct functional regions: cell region, boundary region, and peripheral region. The bumper pattern is specifically positioned in the boundary region, creating a spatial separation between the strain-generating boundary insulating pattern and the sensitive cell active patterns. This segmentation allows the cell region to maintain high integration density with scaled-down transistors while the boundary region independently manages strain effects, preventing pattern defects in the cell area.

Inventive Principle:
Principle #1Segmentation

3Reliability

If boundary insulating patterns are used to separate cell and peripheral regions, then device isolation is improved, but strain-induced pattern defects occur

Engineering Contradiction:
Improveregion isolationVSAvoidpattern dimensional control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The bumper pattern acts as an intermediary buffer zone between the boundary insulating pattern and the cell active patterns. While the boundary insulating pattern provides necessary electrical isolation between cell and peripheral regions, the bumper pattern intercepts and absorbs the mechanical strain it generates. This prevents strain-induced dimensional changes in the cell active patterns, maintaining manufacturing precision and pattern dimensional control despite the presence of boundary insulating structures.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11903187B2Semiconductor devices
Publication Date: 2024.02.13 SAMSUNG ELECTRONICS CO LTD
  • US11903187B2 patent drawing
  • US11903187B2 patent drawing
  • US11903187B2 patent drawing

AI summary

A semiconductor device includes a substrate including a cell region, a peripheral region, and a boundary region between the cell region and the peripheral region, cell active patterns on the cell region of the substrate, peripheral active patterns on the peripheral region of the substrate, a boundary insulating pattern disposed on the boundary region of the substrate and disposed between the cell active patterns and the peripheral active patterns, and a bumper pattern disposed on the cell region of the substrate and disposed between the boundary insulating pattern and the cell active patterns. A width of the bumper pattern in a first direction parallel to a top surface of the substrate is greater than a width of each of the cell active patterns in the first direction.