Semiconductor Dielectric Layering Against BPSG Acid Corrosion

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Solution Overview

Problem

Borophosphosilicate glass in semiconductor manufacturing is prone to acid corrosion due to phosphorus precipitation, leading to structural loss and short-circuit failures, especially when exposed to water vapor or chemical cleaning agents.

Innovation Solution

A method involving the formation of an isolating layer, a protection layer, and a dielectric layer on a substrate, with a groove structure and contact holes that prevent direct contact between the isolating layer and phosphoric acid, using chemical mechanical polishing and high-temperature reflow to ensure integrity and step coverage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If BPSG is used as a pre-metal dielectric layer with CVD method, then doping of boron and phosphorus is achieved, but acid corrosion occurs due to phosphorus precipitation leading to structural loss and short-circuit failures

Engineering Contradiction:
Improvedevice reliabilityVSAvoidacid corrosion
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent introduces an isolating layer as an intermediary barrier between the BPSG dielectric layer and the substrate. This isolating layer prevents phosphoric acid generated from phosphorus precipitation in the BPSG from corroding the substrate, thereby eliminating the harmful acid corrosion effect while maintaining the doping functionality of BPSG

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent segments the original direct contact structure into multiple layers: substrate, isolating layer, and BPSG dielectric layer. This segmentation isolates the substrate from the corrosive environment created by phosphorus precipitation in the BPSG, preventing structural loss and short-circuit failures

Inventive Principle:
Principle #1Segmentation

2Stability of the object's composition

If the isolating layer is directly exposed to phosphoric acid, then structural loss occurs, but adding protection layers increases device complexity

Engineering Contradiction:
Improveisolating layer integrityVSAvoidlayer structure complexity
Core Design Contradiction:
Stability of the object's compositionVSDevice complexity

Solution Approach 1:

The isolating layer is formed on the substrate before depositing the BPSG dielectric layer. This preliminary action ensures that the isolating layer is already in place to protect the substrate from any phosphoric acid that may be generated during subsequent processing or device operation, preventing structural loss before it can occur

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method effectively protects the semiconductor device from acid corrosion, maintaining the integrity of the metal dielectric layer and preventing short circuits by isolating the isolating layer from phosphoric acid, ensuring reliable device operation.

Implementation Method 1

forming a protection layer in the groove and on the isolating layer... a connection position between the isolating layer and the contact hole is covered with the protection layer

Methodology Applied
Scientific EffectPhysical barrier protection:

Implementation Method 2

forming a groove in the isolating layer, where the groove penetrates the isolating layer, and a cross-section area of a side of the groove close to the substrate gradually increases to the cross-section area of the side of the groove away from the substrate

Methodology Applied
Scientific EffectGeometric stress distribution:

Implementation Method 3

using chemical mechanical polishing and high-temperature reflow to ensure integrity and step coverage

Methodology Applied
Scientific EffectChemical mechanical polishing:

Implementation Method 4

using chemical mechanical polishing and high-temperature reflow to ensure integrity and step coverage

Methodology Applied
Scientific EffectThermal reflow:

Data Source

PatentUS12165913B2Method for manufacturing semiconductor device and semiconductor device
Publication Date: 2024.12.10 CHANGXIN MEMORY TECH INC
  • US12165913B2 patent drawing
  • US12165913B2 patent drawing
  • US12165913B2 patent drawing

AI summary

A method for manufacturing a semiconductor device includes: forming an isolating layer on a surface of a substrate; forming a groove on the isolating layer, where the groove penetrates the isolating layer; forming a protection layer in the groove and on the isolating layer; forming a dielectric layer on the protection layer; and forming a contact hole, where the contact hole penetrates the protection layer and the dielectric layer to the surface of the substrate, respectively. The method for manufacturing the semiconductor device according to the present invention can be used not only in chemical vapor deposition but also in a process of a metal wire of a short-circuit in physical vapor deposition.