Semiconductor Bridge Pattern Formed by Selective Epitaxial Growth
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Solution Overview
Problem
Current semiconductor memory devices face challenges in achieving high integration and large data capacity due to limitations in active pattern formation, particularly in forming bridge patterns without relying on photolithography processes, which can be prone to process failures and reduce margin for pattern accuracy.
Innovation Solution
The semiconductor memory device incorporates a bridge pattern formed by selective epitaxial growth with a crystal direction different from the substrate, connecting linear patterns and utilizing multiple isolation layers to support the bridge pattern, allowing for increased integration and data capacity without the need for photolithography, thereby enhancing process margin and pattern accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If photolithography process is used to form bridge patterns, then pattern formation is achieved, but process failures occur and margin for pattern accuracy is reduced
Solution Approach 1:
The patent replaces the photolithography process (optical/mechanical system) with a self-aligned epitaxial growth process. The bridge pattern is formed by selective epitaxial growth on exposed semiconductor substrate surfaces, eliminating the need for photolithography and thereby removing the associated process failures and accuracy margins issues.
2Productivity
If conventional active patterns are used, then device structure is formed, but high integration and large data capacity are limited
Solution Approach 1:
The patent divides the active pattern into multiple linear patterns separated by isolation trenches, with bridge patterns connecting them. This segmentation allows for higher integration by creating distinct functional regions while maintaining electrical connectivity through the bridge patterns, thereby increasing data capacity without excessive complexity.
Solution Approach 2:
The patent introduces a new dimension to the active pattern structure by forming bridge patterns that extend in a direction perpendicular to the linear patterns. This dimensional addition enables more complex circuit layouts and higher integration density without significantly increasing planar complexity.
3Manufacturing precision
If bridge pattern is formed without photolithography, then process margin is increased, but alternative formation method must be implemented
Solution Approach 1:
The patent replaces photolithography with selective epitaxial growth, using chemical vapor deposition to form the bridge pattern. This substitution increases process margin by eliminating photolithography-related failures, and while the method is different, it is well-established in semiconductor manufacturing, maintaining ease of manufacture.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the formation of high-integration semiconductor memory devices with improved data capacity by forming bridge patterns with distinct crystal directions, increasing process margin and reducing the risk of photolithography-related failures, thus enhancing the overall performance and reliability of the memory device.
Implementation Method 1
A selective epitaxial growth process is performed on the exposed sidewall of the at least one of the linear patterns to form a bridge pattern including a semiconductor material having a second crystal direction different from the first crystal direction
Data Source
AI summary
A semiconductor memory device includes linear patterns disposed between isolation trenches extending in a first direction in a semiconductor device and having a first crystal direction the same as the semiconductor substrate. A bridge pattern connects at least two adjacent linear patterns and includes a semiconductor material having a second crystal direction different from the first crystal direction. A first isolation layer pattern is disposed in at least one of the isolation trenches in a field region of the semiconductor substrate. Memory cells are disposed on at least one of the linear patterns.