Semiconductor Bridge Insulating Layer Stress Management
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Solution Overview
Problem
Existing semiconductor devices face challenges in minimizing crystal defects and achieving miniaturization due to stress generated from thermal expansion of trench and field insulating layers, which affects the positional relationship and leads to device degradation.
Innovation Solution
Incorporating a bridge insulating layer that connects the trench and field insulating layers, maintaining a predetermined width in the intermediate region to restrict thermal expansion and contraction, thereby reducing stress and crystal defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If trench insulating layer and field insulating layer are formed separately with gaps, then manufacturing is easier, but thermal expansion stress causes crystal defects
Solution Approach 1:
A bridge insulating layer is introduced as an intermediary structure between the trench insulating layer and field insulating layer. This bridge insulating layer includes a bridge buried portion that physically connects the two insulating layers, serving as a mediator that transfers and distributes thermal stress, preventing crystal defects while maintaining manufacturing simplicity
Solution Approach 2:
The bridge insulating layer is divided into multiple segments: a bridge upper portion extending upward from the bridge buried portion, and a bridge buried portion embedded in the semiconductor layer. This segmentation allows each part to fulfill specific functions - the buried portion provides structural connection and stress distribution, while the upper portion maintains electrical isolation
2Productivity
If device size is reduced for miniaturization, then productivity increases, but stress concentration increases causing crystal defects
Solution Approach 1:
The bridge insulating layer is segmented into a bridge buried portion and a bridge upper portion, allowing the stress distribution function to be separated from the electrical isolation function. This enables miniaturization while maintaining stress management capability
Solution Approach 2:
The bridge buried portion is selectively positioned in the intermediate region between the trench insulating layer and field insulating layer, providing localized stress relief exactly where needed. This local quality approach allows miniaturization without compromising overall device reliability
3Reliability
If bridge insulating layer with bridge buried portion is added, then crystal defects are suppressed, but device complexity increases
Solution Approach 1:
The bridge insulating layer merges multiple functions into a single structure: electrical isolation between regions, mechanical stress distribution, and structural support. This consolidation reduces the need for separate components, thereby suppressing crystal defects without proportionally increasing device complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively suppresses crystal defects and supports miniaturization by maintaining the structural integrity and reducing stress in the semiconductor device, enhancing its performance and reliability.
Implementation Method 1
stress generated from thermal expansion of trench and field insulating layers
Data Source
AI summary
A semiconductor device includes: a semiconductor layer having a partitioned region partitioned by a trench; a field insulating layer which is formed on a main surface of the semiconductor layer at an interval from the trench toward an inner side of the partitioned region and covers the partitioned region; a trench insulating layer formed at least in the trench; an intermediate region annularly formed between the field insulating layer on the main surface of the semiconductor layer and the trench insulating layer; and a bridge insulating layer which is formed in the intermediate region and connects the field insulating layer and the trench insulating layer, wherein the bridge insulating layer has a bridge buried portion buried in the main surface of the semiconductor layer.