Semiconductor Bridge Layer for FinFET Contact Resistance
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Solution Overview
Problem
The reduction of channel length in MOSFETs to enhance operational speed and integration leads to short channel effects, necessitating alternative transistor designs that maintain performance at low operation voltages.
Innovation Solution
The implementation of a semiconductor device with a bridge layer and epitaxial layers, where the bridge layer has a different germanium concentration and includes boron, connecting active fins and epitaxial layers with a capping layer of the same material, ensuring uniform surface planes and reduced contact resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the channel length of MOSFET is reduced to enhance operational speed and integration, then operational speed and integration degree are improved, but short channel effect occurs
Solution Approach 1:
The patent transitions from planar MOSFET to FinFET architecture, utilizing three-dimensional vertical fins to extend the channel length effectively while maintaining a short gate length. This dimensional change allows better control of carrier flow and reduces short channel effects, enabling high-speed operation with improved reliability
Solution Approach 2:
The patent employs composite material structures including silicon-germanium (SiGe) epitaxial layers with varying germanium concentrations, stressor layers, and capping layers. These composite structures provide both mechanical stress to enhance carrier mobility (improving speed) and structural integrity to mitigate short channel effects
2Reliability
If epitaxial layers with tensile or compressive stress are used to increase carrier mobility, then carrier mobility is improved, but manufacturing complexity increases
Solution Approach 1:
The patent applies local quality by creating epitaxial layers with spatially varying germanium concentrations and stress characteristics. Different regions of the FinFET structure have optimized stress states (tensile or compressive) tailored to enhance carrier mobility in specific channel regions, while maintaining overall manufacturing feasibility through systematic layer deposition
3Reliability
If bridge layer with different germanium concentration is used to connect epitaxial layers, then contact resistance is reduced, but manufacturing precision requirements increase
Solution Approach 1:
The patent utilizes parameter changes by varying the germanium concentration in the bridge layer connecting epitaxial structures. This compositional parameter adjustment optimizes the electrical and mechanical properties of the bridge layer, reducing contact resistance while the systematic epitaxial growth process maintains sufficient manufacturing precision through controlled deposition conditions
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces contact resistance and ensures stable silicide formation, enhancing the operational efficiency and reliability of the semiconductor device by maintaining even surface planes and adequate contact area.
Implementation Method 1
The bridge layer may have a different germanium (Ge) concentration from those of the first through the third epitaxial layers
Implementation Method 2
a first epitaxial layer on the first active fin, a second epitaxial layer on the second active fin, a third epitaxial layer on the bridge layer
Data Source
AI summary
A semiconductor device includes a substrate, a first active fin and a second active fin on the substrate, respectively, a plurality of first epitaxial layers on the first active fin and on the second active fin, respectively, a plurality of second epitaxial layers on the plurality of first epitaxial layers, a bridge layer connecting the plurality of second epitaxial layers to each other, and a third epitaxial layer on the bridge layer.


