Semiconductor Structure With Bridging Voids To Suppress Strain

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Solution Overview

Problem

Conventional semiconductor device production techniques fail to prevent strain at the interface between the growth substrate and semiconductor layer, leading to poor crystallinity due to lattice mismatch, which affects electron behavior and internal stress.

Innovation Solution

A semiconductor structure is designed with a substrate, bridging portions, and a semiconductor layer where the bridging portions have through holes and are not in contact with the semiconductor layer, creating voids that prevent lattice mismatch and subsequent strain, thereby enhancing crystallinity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a superlattice layer and layered structure of thin films are provided to relax interfacial strain, then the crystallinity of the semiconductor layer is improved, but the occurrence of strain at the interface between the growth substrate and the semiconductor layer cannot be prevented

Engineering Contradiction:

Improvecrystallinity of semiconductor layerVSAvoidstrain at interface between growth substrate and semiconductor layer

Core Design Contradiction:

Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

The patent divides the interface region into discrete segments by forming isolated bridging portions (nucleation islands) rather than a continuous interface. These segmented bridging portions are spaced apart to create void regions, preventing continuous strain transmission while maintaining localized crystalline nuclei that promote excellent crystallinity in the overlying semiconductor layer.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent introduces bridging portions as intermediary structures between the growth substrate and the semiconductor layer. These bridging portions serve as mediating elements that provide lattice-matched nucleation sites, eliminating the direct harmful interface between mismatched materials while still enabling controlled crystal growth with excellent crystallinity.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Device complexity

If the growth substrate and semiconductor layer are brought into direct contact, then the device structure is simplified, but lattice mismatch causes strain and poor crystallinity

Engineering Contradiction:

Improvestructure of semiconductor deviceVSAvoidcrystallinity of semiconductor layer

Core Design Contradiction:

Device complexityVSManufacturing precision

Solution Approach 1:

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent applies local quality by creating specific bridging portions with controlled properties (material composition, size, spacing) only where needed at the interface region. The bridging portions have different characteristics from both the substrate and the semiconductor layer, providing localized lattice matching without requiring complete structural modification throughout the entire device.

Inventive Principle:

Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The approach effectively reduces strain and threading dislocation density, resulting in a semiconductor layer with excellent crystallinity and improved electron behavior.

Implementation Method 1

a strain or a lattice defect (due to a lattice mismatch) may occur at the interface between the growth substrate and the semiconductor layer

Methodology Applied

Scientific EffectLattice mismatch:

Data Source

PatentUS10205053B2Semiconductor structure and semiconductor device

Publication Date: 2019.02.12 TOYODA GOSEI CO LTD

AI summary

There are provided a semiconductor structure exhibiting excellent crystallinity by preventing the occurrence of a strain, and a semiconductor device. The semiconductor structure comprises a substrate, a bridging portion bridged to the substrate, a semiconductor layer formed on the bridging portion, a void defined by the substrate and the bridging portion. The bridging portion has a plurality of through holes. The through holes are blocked with the semiconductor layer. Therefore, the semiconductor layer does not have a through hole.