Semiconductor Buffer Layer Proton Concentration Profile
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Solution Overview
Problem
The semiconductor device with a proton buffer layer formed by multiple implantations experiences steep concentration gradients, leading to sharp depletion layer stopping and oscillation of voltage and current during switching operations, which negatively affects the performance of IGBTs and diodes.
Innovation Solution
A semiconductor device with a first buffer layer having multiple peaks of proton concentration, where the concentration gradient from peaks closer to the surface is smaller than from those farther away, reducing the sharp stopping of the depletion layer and preventing oscillation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the thickness of the wafer is reduced to reduce resistance, then the on-voltage is reduced, but the depletion layer reaches the back surface causing decrease in withstand voltage or increase in leak current
Solution Approach 1:
The patent applies local quality by creating an n+ type buffer layer with specifically engineered non-uniform concentration distribution at the back surface of the wafer. This localized high-concentration region (with peak concentrations of 1×10^19 to 1×10^20 atoms/cm³) is positioned precisely where the depletion layer reaches during switching operations, providing localized electrical properties that prevent carrier depletion and maintain withstand voltage without requiring overall wafer thickening.
Solution Approach 2:
The patent employs parameter changes by controlling the depth and concentration distribution of the buffer layer through ion implantation parameters. By adjusting implantation energy (50-200 keV), dose (1×10^15 to 1×10^16 ions/cm²), and performing multiple implantations, the patent achieves a tailored concentration profile with peaks at specific depths (5-20 μm from back surface) that optimizes both on-voltage and withstand voltage characteristics.
2Loss of energy
If an n+ type buffer layer with small depth is formed to reduce on-voltage, then the switching loss is reduced, but the depletion layer reaches the back surface causing carrier depletion and oscillation
Solution Approach 1:
The patent creates a localized high-concentration n+ region at the back surface with peak concentrations of 1×10^19 to 1×10^20 atoms/cm³ positioned at depths of 5-20 μm from the back surface. This localized structure provides sufficient doping to prevent carrier depletion and eliminate oscillation during switching operations, while maintaining the overall thin wafer structure for low switching loss.
Solution Approach 2:
The patent employs periodic action by performing multiple ion implantation cycles to build up the desired concentration profile. The buffer layer is formed through repeated implantation steps (typically 2-5 cycles) with appropriate spacing between cycles, allowing progressive accumulation of dopant atoms to achieve the target peak concentration and depth distribution that prevents oscillation.
3Object-generated harmful factors
If an n+ type buffer layer with large depth of approximately 30 μm is formed to prevent carrier depletion, then the oscillation is prevented, but the manufacturing time increases to 24 hours or longer
Solution Approach 1:
The patent dramatically reduces manufacturing time by changing the implantation parameters: using lower energy (50-200 keV), higher dose (1×10^15 to 1×10^16 ions/cm² per cycle), and performing multiple cycles. This achieves the required peak concentration (1×10^19 to 1×10^20 atoms/cm³) at optimal depths (5-20 μm) in approximately 2 hours total, compared to 24+ hours for thermal diffusion, thereby preventing oscillation while maintaining high productivity.
Solution Approach 2:
The patent replaces the thermal diffusion process (which relies on thermal energy and takes 24+ hours) with ion implantation (which uses kinetic energy of accelerated ions). This substitution of the physical mechanism allows precise control of dopant depth and concentration, achieving the desired buffer layer profile in approximately 2 hours while preventing oscillation during switching operations.
4Object-generated harmful factors
If protons are implanted several times to form a buffer layer with large depth, then the oscillation is prevented, but the concentration gradient becomes steep causing sharp depletion layer stopping
Solution Approach 1:
The patent creates a buffer layer with highly non-uniform concentration distribution featuring distinct peaks at specific depths (5-20 μm from back surface) with peak concentrations of 1×10^19 to 1×10^20 atoms/cm³. This localized peak structure, rather than uniform distribution, provides the necessary doping concentration precisely where the depletion layer reaches during switching, preventing oscillation while controlling the concentration gradient to avoid sharp stopping.
Solution Approach 2:
The patent performs multiple ion implantation cycles with appropriate spacing and varying parameters to build up a concentration profile with peaks at desired depths. By controlling the number of cycles, dose per cycle, and energy levels, the patent achieves a smooth overall gradient with localized peaks that prevent both oscillation and sharp depletion layer stopping, maintaining stability of the buffer layer composition.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The device effectively prevents oscillation of voltage and current by smoothing the concentration gradient, enhancing the turn-off performance of IGBTs and diodes while maintaining a large buffer layer depth.
Implementation Method 1
a buffer layer having a depth of approximately 30 μm can be formed by implanting protons several times using a proton implanter
Implementation Method 2
a thermal treatment is performed at a temperature of 350° C. to 450° C. for one hour to five hours, thereby activating the protons
Data Source
AI summary
An object of the present invention is to provide a semiconductor device capable of preventing an occurrence of oscillation of voltage and current and a method of manufacturing the same. A semiconductor device according to the present invention includes an n type silicon substrate and a first n type buffer layer formed in a back surface of the n type silicon substrate and having a plurality of peaks of concentration of protons whose depths from the back surface are different from each other. In the first n type buffer layer, a concentration gradient of the protons from the peak located in a position closer to the back surface toward the surface of the n type silicon substrate is smaller than a concentration gradient of the protons from the peak located in a position farther away from the back surface toward the surface.