Semiconductor Transistor Buffer Layer for Salicide Process

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Solution Overview

Problem

Conventional methods for forming semiconductor devices face issues with silicon nitride residue and over etching at the interface between P-type and N-type MOS transistors, leading to degraded performance and reduced yield.

Innovation Solution

A method involving the formation of a substrate with transistors of different conductive types, a buffer layer, and a tensile material layer, where the tensile material layer is thinned and removed through a spike annealing process, followed by a salicide process with a salicide blocking layer to prevent residue and over etching, using wet etching and thermal processes to control the thickness and material composition.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a two-step silicon nitride removal process is used to increase electron mobility in N-type MOS transistor, then electron mobility is improved, but silicon nitride residue or over etching occurs at the interface between P-type and N-type MOS transistors

Engineering Contradiction:
Improveelectron mobilityVSAvoidsilicon nitride removal precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

A buffer layer is introduced between the silicon nitride layer and the substrate as an intermediary protective element. This buffer layer prevents direct contact between the etching process and the substrate, thereby avoiding over etching and damage to the substrate and isolation structures while still allowing complete removal of silicon nitride from N-type transistor regions

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The buffer layer is formed in advance before the silicon nitride removal process. This preliminary protective layer is already in place to prevent potential over etching damage before the etching process begins, ensuring that even if etching conditions are aggressive, the substrate and isolation structures remain protected

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If the pattern mask layer is adjusted to prevent silicon nitride residue, then residue is avoided, but over etching damage occurs to the isolation structure or substrate

Engineering Contradiction:
Improvesilicon nitride removal completenessVSAvoidover etching damage
Core Design Contradiction:
Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

The buffer layer serves as a sacrificial intermediary that absorbs the harshness of the etching process. It allows the etching to proceed aggressively enough to completely remove silicon nitride without directly damaging the substrate or isolation structures, as the buffer layer protects these critical elements

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively avoids silicon nitride residue and over etching issues, maintaining transistor performance and yield by protecting the underlayer buffer and preventing damage during the removal process.

Implementation Method 1

A buffer layer is formed over the substrate... protecting the underlayer buffer and preventing damage during the removal process

Methodology Applied
Scientific EffectPhysical barrier protection:

Implementation Method 2

a spike annealing process is performed

Methodology Applied
Scientific EffectThermal annealing: Annealing

Implementation Method 3

The tensile material layer is removed to expose the buffer layer over the substrate

Methodology Applied
Scientific EffectWet etching:

Data Source

PatentUS7585790B2Method for forming semiconductor device
Publication Date: 2009.09.08 UNITED MICROELECTRONICS CORP
  • US7585790B2 patent drawing
  • US7585790B2 patent drawing
  • US7585790B2 patent drawing

AI summary

A method of forming a semiconductor device. The method comprises steps of providing a substrate having a first transistor, a second transistor and non-salicide device formed thereon and the conductive type of the first transistor is different from that of the second transistor. A buffer layer is formed over the substrate and a tensile material layer is formed over the buffer layer. A portion of the tensile material layer over the second transistor is thinned and a spike annealing process is performed. The tensile material layer is removed to expose the buffer layer over the substrate and a patterned salicide blocking layer is formed over the non-salicide device. A salicide process is performed for forming a salicide layer on a portion of the first transistor and the second transistor.