Semiconductor Device With Variable Electrical Field Buffer Spacing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The complexity of manufacturing semiconductor devices with super junction structures is increased due to varying depths and widths of columnar regions, making it difficult to maintain equal impurity concentrations and adjust ion implantation accurately.
Innovation Solution
A semiconductor device design where the interval and width of electrical field buffer regions gradually change from the interior to the exterior, allowing for equal distances between columnar regions and simplifying the manufacturing process by maintaining consistent impurity concentrations across regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the depth and width of columnar regions are made different to reduce impurity variation, then the charge ratio between p type and n type columnar regions becomes constant and resistance improves, but the manufacturing process becomes complex and it becomes difficult to adjust the amount of implanted ions
Solution Approach 1:
The patent applies local quality by creating electrical field buffer regions with different intervals in different areas. Specifically, the interval between electrical field buffer regions on the interior side of the periphery region is made smaller than the interval on the exterior side. This local variation in interval allows for optimized electrical field distribution and improved resistance without requiring different depths or widths of columnar regions throughout the structure.
2Manufacturing precision
If the depth of columnar regions is made deeper to improve charge distribution, then the charge ratio between p type and n type columnar regions becomes constant, but it becomes very difficult to adjust the amount of implanted ions and maintain equal impurity concentrations
Solution Approach 1:
The patent changes the parameter of electrical field buffer region interval to achieve the desired effect. By making the interval between electrical field buffer regions smaller on the interior side and larger on the exterior side, the patent achieves improved resistance and simplified manufacturing without needing to precisely control ion implantation depths or impurity concentrations in columnar regions of different depths.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances resistance by widening the depletion layer and buffering the electrical field, reducing leak current and simplifying the manufacturing process by ensuring consistent impurity distribution across columnar regions.
Implementation Method 1
by widening the depletion layer and buffering the electrical field
Implementation Method 2
a plurality of second conduction type electrical field buffer regions formed on an upper part of the second columnar region
Data Source
AI summary
A semiconductor device 1 including a cell region 2 formed with a semiconductor element 6 and a periphery region 3 formed in the periphery of the cell region 2. The semiconductor region 1 is arranged with an n− type drift region 12 formed in the cell region 2 and periphery region 3, a plurality of p− type columnar regions formed in the n− drift region 12 of the cell region 2, a plurality of p− type columnar resistance improvement regions 23n formed in the n− type drift region 12 of the periphery region 3, and a plurality of electrical field buffer regions 24n formed in an upper part of the p− type columnar region 23n. An interval Sn between the electrical field buffer region 24n and an adjacent electrical field buffer region 24n is different between an interior side and an exterior side of the periphery region 3.