Semiconductor Memory Bulk Voltage Generation Circuit Power-Down Exit
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Solution Overview
Problem
Semiconductor memory devices face challenges in preventing misoperation due to the shorting of bulk and internal voltages during the transition from power-down mode, which can cause unstable threshold voltages and increased leakage currents, leading to power consumption issues.
Innovation Solution
A semiconductor memory device with a bulk voltage generation circuit that includes an exit signal generation unit, a voltage driving control unit, and a level control unit to manage the bulk voltage by interrupting its driving and controlling its level upon exiting the power-down mode, using a combination of external and internal voltages to prevent voltage shorting and misoperation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If bulk voltage driving is interrupted during power-down mode exit, then voltage shorting and misoperation are prevented, but the complexity of the voltage control system increases
Solution Approach 1:
The bulk voltage generation circuit proactively interrupts the bulk voltage driving operation before the internal voltage stabilizes during the power-down mode exit transition. This preliminary action prevents the potential shorting between bulk and internal voltages before it can occur, eliminating the misoperation risk without requiring complex real-time monitoring circuits.
Solution Approach 2:
The circuit employs periodic control of the bulk voltage driving based on the power-down mode exit signal. By periodically interrupting and resuming the bulk voltage driving in synchronization with mode transitions, the circuit prevents voltage conflicts during critical transition periods while maintaining normal operation during stable modes, achieving reliability improvement with moderate control complexity.
2Loss of energy
If bulk voltage level is adjusted during power-down mode, then leakage current is reduced, but the stability of threshold voltage may be compromised during mode transition
Solution Approach 1:
The bulk voltage generation circuit applies different bulk voltage levels to different operational modes locally. During power-down mode, a specific bulk voltage level is maintained to minimize leakage current in the internal circuit, while during normal operation, the bulk voltage is adjusted to ensure optimal threshold voltage stability. This localized voltage control optimizes performance for each specific operational state.
Solution Approach 2:
The circuit preliminarily adjusts the bulk voltage level before mode transitions occur. When exiting power-down mode, the bulk voltage driving is interrupted in advance to prevent threshold voltage instability caused by voltage conflicts, ensuring smooth transition while maintaining the leakage current reduction benefits during the power-down state.
3Ease of operation
If bulk voltage driving continues during power-down mode exit, then circuit operation is simplified, but voltage shorting causes misoperation
Solution Approach 1:
The bulk voltage generation circuit implements periodic control by interrupting the bulk voltage driving specifically during the power-down mode exit transition period. This periodic interruption is synchronized with the mode transition timing, preventing voltage shorting and misoperation while maintaining simple continuous operation during stable power-down and normal operation modes. The control adds minimal complexity only where necessary.
Data Source
AI summary
A semiconductor memory device includes a bulk voltage generation circuit configured to interrupt driving of a bulk voltage in response to an exit signal which is generated in synchronization with a time at which a power-down mode is ended, and discharge charges of a first node from which the bulk voltage is outputted, in response to the exit signal; and an internal circuit including a MOS transistor which is supplied with the bulk voltage.