Semiconductor Bump with Concave Portions for Low-Pressure Mounting

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Solution Overview

Problem

Semiconductor chips with fine pitches face increased probabilities of short or open defects during mounting due to conductive particle concentration on connection terminals, and high-pressure processes can cause cracks in bumps and wiring lines.

Innovation Solution

A semiconductor chip design featuring bumps with concave portions and protrusions that allow for direct connection to connection pads using ultrasonic vibration and low-pressure processes, eliminating the need for anisotropic conductive films and ensuring stable, low-resistance connections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If an anisotropic conductive film is used to mount the semiconductor chip, then the chip can be connected to the electronic device, but conductive particles may concentrate on connection terminals causing short defects or fail to arrange properly causing open defects

Engineering Contradiction:
Improveconnection reliabilityVSAvoidshort and open defects
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent removes the anisotropic conductive film from the connection structure, replacing it with a direct bump-to-pad connection. This extraction eliminates the source of conductive particle concentration and arrangement problems, thereby preventing short and open defects while maintaining connection reliability

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces a specific bump structure with concave portions as an intermediary element between the semiconductor chip and electronic device. This bump design with controlled geometry and material properties enables reliable direct connection without requiring conductive particles, thus avoiding the harmful effects of particle concentration and misalignment

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If a high-pressure process is applied to secure low-resistance connection, then connection resistance is reduced, but cracks occur in bumps, connection pads, and wiring lines

Engineering Contradiction:
Improveconnection resistanceVSAvoidstructural integrity
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The patent changes the pressure parameter from high to low by redesigning the bump structure with concave portions. This geometric modification allows the connection to achieve low resistance through increased contact area and improved mechanical interlocking, eliminating the need for high-pressure application that would cause structural damage

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent employs curved surfaces by designing concave portions in the bumps. These curved geometries increase the contact area between the bump and connection pad, distributing the connection force more evenly and achieving low resistance without requiring high pressure, thus preventing cracks in bumps, pads, and wiring lines

Inventive Principle:
Principle #14Spheroidality (Curvature)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design enables stable and high-quality connections between semiconductor chips and electronic devices, even with fine pitch bumps, without using anisotropic conductive films, and reduces the risk of defects and damage from high-pressure processes.

Implementation Method 1

connecting the bumps to corresponding ones of the connection pads by applying vibration and pressure to the semiconductor chip

Methodology Applied
Scientific EffectUltrasonic vibration: Ultrasonic Vibration

Implementation Method 2

melting portions of the protrusions and the connection pads by friction by applying ultrasonic vibration to the semiconductor chip

Methodology Applied
Scientific EffectFriction welding: Friction Welding

Implementation Method 3

a conductive connection layer between the connection pads and the bumps

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS10643931B2Semiconductor chip, electronic device including the same, and method of connecting the semiconductor chip to the electronic device
Publication Date: 2020.05.05 SAMSUNG DISPLAY CO LTD
  • US10643931B2 patent drawing
  • US10643931B2 patent drawing
  • US10643931B2 patent drawing

AI summary

A semiconductor chip includes: a base substrate; a conductive pad on one surface of the base substrate; an insulating layer on the one surface of the base substrate and having an opening exposing a portion of the conductive pad; and a bump on the exposed portion of the conductive pad and on the insulating layer around the opening. The bump includes a plurality of concave portions corresponding to the opening and is arranged in a longitudinal direction of the bump.