Semiconductor Bump Height Uniformity via Segmented Seed Layer Electroplating

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Solution Overview

Problem

Conventional methods for forming bumps in semiconductor packages often result in final height differences between main and support bumps due to underlying layer non-uniformities, leading to inadequate electrical connections and reduced physical coupling forces during flip-chip bonding.

Innovation Solution

The method involves forming first and second seed layer patterns separated over the underlying layer, allowing for electroplating under different conditions to achieve uniform final heights for both main and support bumps by controlling current densities and plating times, thereby eliminating height differences between them.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional electroplating is performed on the entire seed layer, then the manufacturing process is simple, but the final heights of main bumps and support bumps differ due to underlying layer non-uniformities

Engineering Contradiction:

Improvebump height uniformityVSAvoidseed layer structure

Core Design Contradiction:

Manufacturing precisionVSDevice complexity

Solution Approach 1:

The seed layer is divided into two separate patterns: a first seed layer pattern for main bumps and a second seed layer pattern for support bumps. This segmentation allows independent electroplating control for each bump type, enabling precise height uniformity despite underlying layer variations.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different electroplating conditions (current density, plating time) are applied to different seed layer patterns based on their specific requirements. The first seed layer pattern receives different plating parameters than the second seed layer pattern, optimizing each for its intended bump type while achieving overall height uniformity.

Inventive Principle:

Principle #3Local quality

2Manufacturing precision

If different electroplating conditions are applied to different seed layer patterns, then bump height uniformity is achieved, but the manufacturing process becomes more complex

Engineering Contradiction:

Improvebump height uniformityVSAvoidelectroplating process

Core Design Contradiction:

Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The electroplating process parameters (current density, plating time, voltage) are changed and optimized for each seed layer pattern. By adjusting these parameters independently for the first and second seed layer patterns, the patent achieves uniform final bump heights while accounting for the non-uniform underlying layer structure.

Inventive Principle:

Principle #35Parameter changes

3Reliability

If uniform plating is applied across the entire chip, then the manufacturing process is simple, but electrical connection reliability decreases due to height differences

Engineering Contradiction:

Improveelectrical connectionVSAvoidseed layer pattern

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The seed layer is segmented into functionally distinct first and second patterns corresponding to main bumps and support bumps. This segmentation enables tailored electroplating for each region, ensuring that main bumps achieve optimal height for reliable electrical connection while support bumps provide stable mechanical support.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different local plating conditions are applied to different regions: the first seed layer pattern (main bump region) receives optimized plating parameters for maximum height and electrical connection reliability, while the second seed layer pattern (support bump region) receives parameters optimized for height uniformity and mechanical stability.

Inventive Principle:

Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach ensures reliable bonding between semiconductor chips and printed circuit boards by maintaining uniform bump heights, enhancing bonding reliability and preventing chip leaning, thus improving yield and packing process reliability.

Implementation Method 1

forming the main bumps and the support bumps of which final heights are the same when viewed on the cross-section in the areas, by performing electroplating through using, as electrodes, the first seed layer patterns and the second seed layer patterns

Methodology Applied

Scientific EffectElectroplating: Electroplating

Data Source

PatentUS10032738B2Method for forming bump of semiconductor package

Publication Date: 2018.07.24 SMART MODULAR TECH LX S A R L

AI summary

The present invention provides a method for forming bumps of a semiconductor package to suppress a final height difference between main bumps and support bumps that is caused by a height difference between areas of an underlying layer when viewed on a cross-section. The method may include forming first seed layer patterns and second seed layer patterns which are disposed in the areas and are separated from each other, over the underlying layer having the height difference. The method may include forming the main bumps and the support bumps of which final heights are the same when viewed on the cross-section in the areas, by performing electroplating through using, as electrodes, the first seed layer patterns and the second seed layer patterns which are disposed in the areas and are separated from each other, under different conditions in the areas.