Semiconductor Bump Structure for Short Circuit Prevention

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Solution Overview

Problem

Conventional semiconductor device package structures have unstable performance, leading to a high likelihood of short circuits due to small intervals between solder balls, which reduces the stability and yield of the package.

Innovation Solution

A package structure for semiconductor devices is developed, where bumps are formed on the pads, and solder balls are placed on these bumps, increasing the interval between adjacent solder balls and enhancing bonding strength by covering both the top surface and sidewalls of the bumps, along with the use of anti-diffusion and wetting layers to prevent oxidation and intermetallic compound formation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If solder balls are placed directly on pads without bumps, then the manufacturing process is simpler, but the interval between adjacent solder balls is small leading to short circuits

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoidshort circuit prevention
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

A bump structure is introduced as an intermediary element between the pad and the solder ball. The bump serves as a mediator that increases the interval between adjacent solder balls, preventing short circuits while maintaining electrical connection functionality.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The invention transitions from a two-dimensional direct placement of solder balls on pads to a three-dimensional structure where solder balls are placed on top of bumps that rise from the pad surface, utilizing the vertical dimension to increase spacing.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If the bump size is made larger to increase solder ball interval, then short circuit risk is reduced, but the bonding area between solder ball and bump decreases

Engineering Contradiction:
Improveshort circuit preventionVSAvoidbonding strength
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The invention optimizes the bump dimensions by controlling the height and top surface area parameters. The bump height is set to provide sufficient interval between solder balls, while the top surface area is maintained at an optimal size to ensure adequate bonding area for the solder ball attachment.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If anti-diffusion and wetting layers are added to prevent oxidation and diffusion, then bonding strength and reliability are improved, but the manufacturing process becomes more complex

Engineering Contradiction:
Improvebonding strengthVSAvoidprocess complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The anti-diffusion and wetting layers are formed on the bump surface before the solder ball placement process. This preliminary action prevents oxidation and diffusion issues before they occur, ensuring reliable bonding without requiring additional corrective steps later in the manufacturing process.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach stabilizes the package structure, reduces the risk of short circuits, and improves the bonding strength and yield by increasing the contact area between solder balls and bumps, while preventing diffusion and oxidation, resulting in enhanced performance and reliability.

Implementation Method 1

Under the gravity, wetting force and surface tension, an interval between adjacent solder balls may be enlarged

Methodology Applied
Scientific EffectSurface tension: Surface Tension

Implementation Method 2

a wetting layer covering the anti-diffusion layer

Methodology Applied
Scientific EffectWetting: Wetting

Implementation Method 3

an anti-diffusion layer covering the surface of the bump

Methodology Applied
Scientific EffectDiffusion barrier: Diffusion Barrier

Implementation Method 4

the wetting layer may be formed by a chemical plating process

Methodology Applied
Scientific EffectChemical plating: Electroplating

Data Source

PatentUS9379077B2Metal contact for semiconductor device
Publication Date: 2016.06.28 NANTONG FUJITSU MICROELECTRONICS
  • US9379077B2 patent drawing
  • US9379077B2 patent drawing
  • US9379077B2 patent drawing

AI summary

A semiconductor device package and packaging method, the semiconductor device packaging method comprising: providing a chip with a bonding pad formed on the chip surface; forming a passivation layer and a bump on the chip surface, wherein the passivation layer has an opening exposing part of the pad, the bump is located in the opening and the size of the bump is less than the size of the opening; forming a solder ball covering the top surface and the side wall of the bump, and the bottom surface of the opening. The formed semiconductor device package is not easy to form a short circuit. The bonding strength between the solder ball and the bump is high and the performance of the semiconductor device is stable.