Semiconductor Bump Stress Buffering via Segmented Redundancy
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Solution Overview
Problem
Semiconductor devices with bumps on ball grid types like CSP or BGA face stress-induced fatigue, leading to breakage and electrical conduction malfunctions when mounted on substrates.
Innovation Solution
A semiconductor device design featuring a semiconductor chip with a stress buffer layer, re-distribution layers, and posts that alleviate stress on bumps, ensuring electrical connectivity through multiple bump configurations, including a first and second bump arrangement with varying diameters and bonding areas, to prevent fatigue-induced failures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If bumps are used to bond semiconductor chip to mounting substrate, then electrical and mechanical connection is achieved, but stress causes bump breakage due to fatigue
Solution Approach 1:
The bonding path is segmented into multiple bumps (first bump and second bump) that provide redundant electrical connection paths. When one bump fails due to stress fatigue, the other bump maintains electrical connectivity, preventing device malfunction.
Solution Approach 2:
The intermediate layer with stress buffer layer is positioned between the semiconductor chip and mounting substrate to absorb and cushion stress before it reaches the bumps. This preliminary stress absorption prevents fatigue-induced bump breakage.
2Reliability
If multiple bumps are arranged to sandwich intermediate layer, then electrical redundancy is achieved, but stress distribution becomes complex
Solution Approach 1:
Different bumps are assigned different functions based on their positions. The first bump provides primary electrical connection while the second bump provides redundant connection. The intermediate layer has different structures in different regions (stress buffer layer, re-distribution layers) to locally manage stress and electrical signals.
3Reliability
If stress buffer layer and re-distribution layers are added to intermediate layer, then stress on bumps is reduced, but device structure becomes more complex
Solution Approach 1:
The stress buffer layer acts as an intermediary between the mounting substrate and the semiconductor chip, absorbing stress and preventing it from reaching the bumps. The re-distribution layers serve as intermediaries to manage electrical signal distribution while providing mechanical support.
Data Source
AI summary
A semiconductor device suitable for preventing malfunction is provided.The semiconductor device includes a semiconductor chip 1, a first electrode pad 21 laminated on the semiconductor chip 1, an intermediate layer 4 having a rectangular shape defined by first edges 49a and second edges, and a plurality of bumps 5 arranged to sandwich the intermediate layer 4 by cooperating with the semiconductor chip 1. The first edges 49a extend in the direction x, whereas the second edges extend in the direction y. The plurality of bumps 5 include a first bump 51 electrically connected to the first electrode pad 21 and a second bump 52 electrically connected to the first electrode pad 21. The first bump 51 is arranged at one end in the direction x and one end in the direction y.