Semiconductor Bump Stress Management via Segmented Design
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Solution Overview
Problem
The semiconductor flip-chip bonding process experiences assembly stresses during molding of metal bumps, leading to potential cracks or detachment of chips, resulting in poor electrical connections and low reliability.
Innovation Solution
A semiconductor device design featuring a protective layer with first and second bumps, where the first bump has a larger cross-section surface area and includes a pillar and solder layer, while the second bump is positioned on the protective layer with a smaller cross-section surface area, sharing and reducing assembly stress, and ensuring proper co-planarity and solder connection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If metal bumps are molded during the semiconductor flip-chip bonding process, then electrical connection between chip and substrate is achieved, but assembly stresses are generated that may cause cracks or detachment of the chip
Solution Approach 1:
The invention divides the bump structure into two distinct segments: first bumps directly on the chip surface and second bumps on the protective layer. This segmentation allows each bump type to serve different functions - the first bumps provide primary electrical connection while the second bumps act as stress-absorbing elements that prevent crack propagation and chip detachment during assembly stress
Solution Approach 2:
The protective layer serves as an intermediary element between the chip and the second bumps. This intermediate structure allows the second bumps to be positioned without directly contacting the chip, thereby absorbing assembly stresses and protecting the chip from stress-induced damage while maintaining electrical connection functionality
2Strength
If the first bump has larger cross-section surface area than the second bump, then assembly stress is reduced, but manufacturing precision requirements increase
Solution Approach 1:
The invention applies different cross-section surface areas to different bump locations based on their specific functional requirements. The first bumps have larger cross-section surface areas to provide primary structural support and stress resistance, while the second bumps have smaller cross-section surface areas optimized for their specific positioning on the protective layer, allowing each region to have the quality needed for its function
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design reduces assembly stress, prevents breakage or detachment of the chip, and enhances the reliability of electrical connections by controlling the height difference between the bumps and optimizing solder layer thickness through surface tension effects.
Implementation Method 1
optimizing solder layer thickness through surface tension effects
Data Source
AI summary
A semiconductor device and a semiconductor package including the same are provided. The semiconductor device includes a semiconductor element; a protective layer disposed adjacent to the surface of the semiconductor element, the protective layer defining an opening to expose the semiconductor element; a first bump disposed on the semiconductor element; and a second bump disposed onto the surface of the protective layer. The first bump has a larger cross-section surface area than the second bump.