Semiconductor Device With Buried Ceramic Terminals

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Solution Overview

Problem

Power semiconductor devices face challenges in reducing size, increasing manufacturing efficiency, and achieving high reliability due to complex terminal arrangements, thick terminal requirements, and extensive bonding wire usage.

Innovation Solution

A semiconductor device design featuring a semiconductor chip with front and rear electrodes, a conductive plate, and a ceramic case with buried terminals, allowing for a compact housing structure with reduced terminal thickness and simplified wiring, utilizing a ceramic case and insulating plate to form a housing with buried terminals connected to the chip and conductive plate.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a power semiconductor chip is accommodated in a cavity package with thick terminals (100 μm or more), then current capacity is sufficient, but it is difficult to manufacture the cavity package having the thick terminal buried therein

Engineering Contradiction:
Improvecurrent capacityVSAvoidmanufacturability of cavity package
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The invention divides the terminal structure into multiple segments: a first terminal (thinner, easier to manufacture) and a second terminal (thicker, provides current capacity). The first terminal is buried in the cavity package while the second terminal is formed on the housing surface, allowing each segment to optimize for its specific function while avoiding the manufacturing difficulties of burying a single thick terminal

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention transitions from a single-dimensional terminal thickness problem to a multi-dimensional solution by extending the terminal structure in multiple directions: the first terminal extends vertically into the cavity, while the second terminal extends horizontally on the housing surface, thereby achieving thick terminal functionality without requiring a single thick buried terminal

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If external terminals are arranged in an outer circumferential portion of the case, then connection to semiconductor chip is achieved, but size of housing cannot be reduced

Engineering Contradiction:
Improveterminal connectionVSAvoidhousing size
Core Design Contradiction:
ReliabilityVSVolume of moving object

Solution Approach 1:

The invention changes the spatial arrangement of terminals from a two-dimensional outer circumferential layout to a three-dimensional configuration where terminals are embedded within the housing structure. The first terminal is buried in the cavity and the second terminal emerges on the housing surface, allowing terminals to be positioned above the semiconductor chip rather than around the perimeter, thereby reducing housing size

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Reliability

If about 20 semiconductor chips are mounted with about 10 bonding wires connected to each chip, then electrical connections are established, but considerable time is consumed for wiring process

Engineering Contradiction:
Improveelectrical connectionVSAvoidwiring process time
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The invention merges multiple bonding wire connections into a single terminal structure. Instead of connecting 10 separate bonding wires to each of 20 chips, the first terminal provides a common electrical connection point that serves multiple chips simultaneously, dramatically reducing the number of wiring operations required

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS9466542B2Semiconductor device
Publication Date: 2016.10.11 FUJI ELECTRIC CO LTD
  • US9466542B2 patent drawing
  • US9466542B2 patent drawing
  • US9466542B2 patent drawing

AI summary

A semiconductor device includes a semiconductor chip having a front electrode and a rear electrode; a conductive plate having a main surface connected to the rear electrode of the semiconductor chip; an insulating plate fixed to a surface of the conductive plate opposite to the main surface; and a ceramic case having first and second terminals buried therein, a cavity accommodating the semiconductor chip, the conductive plate, and the insulating plate, and an electrode surface opposite to an opening portion of the cavity. The first terminal has one end connected to the front electrode of the semiconductor chip, and another end exposed from the electrode surface. The second terminal has one end connected to the main surface of the conductive plate, and another end exposed from the electrode surface. The ceramic case and the insulating plate form a housing.