Semiconductor Buried Region Design for Current Crowding Reduction
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Solution Overview
Problem
Current semiconductor apparatuses experience current crowding issues due to concentration of current at the end portion of contact openings, leading to inefficiencies in semiconductor performance.
Innovation Solution
The semiconductor apparatus includes a semiconductor substrate with a drift region of one conductive type, an anode region of a second conductive type between the substrate's upper surface and the drift region, a cathode region of the first conductive type with higher doping concentration between the substrate's lower surface and the drift region, and a buried region of the second conductive type above the cathode region. The buried region is designed to be shorter than the anode and cathode regions, with specific dimensions and configurations to reduce current concentration and enhance performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the contact opening is made smaller to reduce device area, then the area occupied by the contact opening is reduced, but current crowding becomes more severe at the end portion
Solution Approach 1:
The patent applies local quality by creating a buried region with a second conductive type specifically at the end portion of the contact opening, where current crowding occurs. This localized doped region modifies the electrical properties only in the critical area, allowing smaller contact openings without severe current crowding, while leaving other regions unchanged.
Solution Approach 2:
The buried region acts as an intermediary structure between the contact opening and the underlying regions. It mediates the current flow by providing an additional conductive path through the second conductive type, reducing the concentration of current at the end portion while maintaining electrical connectivity.
2Reliability
If the buried region is extended further below the interlayer dielectric film, then current distribution is improved, but the manufacturing complexity and process difficulty increase
Solution Approach 1:
The patent optimizes the buried region by controlling specific parameters such as its depth (making it shorter than the anode and cathode regions), width, and doping concentration. By carefully selecting these parameters, the patent achieves improved current distribution while keeping the structure manufacturable and avoiding excessive complexity.
3Reliability
If the doping concentration in the cathode region is increased to improve carrier distribution, then carrier distribution is enhanced, but the difficulty of controlling doping precision increases
Solution Approach 1:
The patent applies local quality by creating distinct doped regions with different conductive types at specific locations. The cathode region with higher doping concentration is localized to where it is most needed, allowing precise control of carrier distribution in critical areas while avoiding unnecessary doping in other regions, thus managing doping precision requirements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces current crowding and enhances the semiconductor apparatus's performance by allowing easier electron implantation and carrier distribution, resulting in improved forward voltage and current characteristics.
Implementation Method 1
allowing easier electron implantation and carrier distribution
Implementation Method 2
cathode region having the first conductive type which is disposed between a lower surface of the semiconductor substrate and the drift region and has a higher doping concentration than the drift region
Data Source
AI summary
Provided is a semiconductor apparatus in which the buried region includes an end portion buried region continuously disposed from a region below the contact opening up to a region below the interlayer dielectric film while passing below an end portion of the contact opening in a cross section perpendicular to the upper surface of the semiconductor substrate, and the end portion buried region disposed below the interlayer dielectric film is shorter than the end portion buried region disposed below the contact opening in a first direction in parallel with the upper surface of the semiconductor substrate.


