Semiconductor Bus Segmentation for Priority Access Latency
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Solution Overview
Problem
The increasing complexity of semiconductor devices with multiple circuits and buses leads to difficulties in effectively scheduling and prioritizing requests, resulting in increased latency when accessing target circuits.
Innovation Solution
A semiconductor device with a general bus and a designated bus, where the designated bus connects specific circuits to prioritize urgent requests, allowing for faster access by directly connecting high-priority circuits without the need for complex scheduling through the general bus.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a general bus is used to connect all circuits, then device complexity is reduced, but latency increases for urgent requests due to scheduling difficulties
Solution Approach 1:
The bus system is segmented into a general bus for low-priority communications and a designated bus for high-priority communications. This segmentation allows urgent requests to use the dedicated designated bus, avoiding scheduling delays on the general bus, while maintaining overall system manageability through clear bus separation.
Solution Approach 2:
A bus switching circuit acts as an intermediary between circuits and the two buses. This mediator dynamically routes communications through either the general bus or designated bus based on priority requirements, resolving the conflict between simplified structure and fast access by intelligently selecting the appropriate bus path.
2Loss of time
If a designated bus is added to prioritize urgent requests, then access latency is reduced, but device complexity increases
Solution Approach 1:
The bus system is segmented into a general bus for low-priority communications and a designated bus for high-priority communications. This segmentation allows urgent requests to use the dedicated designated bus, avoiding scheduling delays on the general bus, while maintaining overall system manageability through clear bus separation.
Solution Approach 2:
Circuits are designed with multi-functionality to communicate through either the general bus or designated bus depending on priority needs. The bus switching circuit also serves multiple functions by dynamically routing signals based on priority, reducing the need for completely separate dedicated paths for all high-priority communications.
3Reliability
If complex scheduling is implemented on the general bus, then priority handling is improved, but ease of operation deteriorates
Solution Approach 1:
The scheduling complexity is extracted from the general bus by moving high-priority communications to the designated bus. This extraction eliminates the need for complex priority scheduling algorithms on the general bus, as urgent requests are automatically routed to the designated bus where they can be handled with simpler, more direct scheduling.
Data Source
AI summary
A semiconductor device includes a plurality of circuits, a general bus configured to be connected to each of the plurality of circuits and to provide a general channel among the plurality of circuits, and a designated bus configured to be connected to a subgroup of circuits from among the plurality of circuits and to provide a designated channel among the subgroup of circuits.