Semiconductor Busbar Inductance Balancing for Current Imbalance
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Solution Overview
Problem
The miniaturization of next-generation semiconductor elements leads to current imbalances among semiconductor modules due to variations in inductance of conductors, causing uneven switching speeds and stress on semiconductor elements, which reduces the reliability of the modules.
Innovation Solution
The semiconductor device comprises a first semiconductor module with a higher switching voltage threshold and a second module with a lower threshold, connected via busbars where the inductance of the current path to the common terminal is optimized to minimize current imbalances by selecting modules based on measured switching voltage thresholds and inductances.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If semiconductor modules are connected in parallel using conventional busbars with low inductance design, then the inductance of conductors is reduced, but current imbalance occurs due to variations in inductance from common terminal to each module
Solution Approach 1:
The patent applies local quality by varying the inductance of busbar connection points for different semiconductor modules. Specifically, modules with higher threshold voltages are connected to busbar points with lower inductance, while modules with lower threshold voltages are connected to busbar points with higher inductance. This localized differentiation of inductance values compensates for the inherent inductance variations in the current paths, thereby balancing the current distribution across all modules and improving reliability.
2Productivity
If next-generation semiconductor elements are miniaturized, then high speed operation and high efficiency are achieved, but inductance of connecting conductors becomes larger compared to internal inductance
Solution Approach 1:
The patent applies parameter changes by systematically adjusting the inductance parameter of the busbar connection points to match the characteristics of different semiconductor modules. By measuring and comparing the inductance values from each module's connection point to the common terminal, the system selects appropriate connection points that balance the total inductance (module internal inductance plus busbar inductance) for each module. This parameter matching approach enables high-speed operation while managing the increased inductance complexity introduced by miniaturization.
3Reliability
If current imbalance occurs among semiconductor modules, then switching speed variation and stress on semiconductor elements increase, but uniform inductance design does not account for module variations
Solution Approach 1:
The patent applies preliminary action by pre-measuring and characterizing the inductance of each semiconductor module's current path before final assembly. The system calculates the required busbar connection point inductance for each module to achieve balanced current distribution. By determining and assigning appropriate connection points in advance, based on each module's specific inductance characteristics and threshold voltage, the system eliminates current imbalance issues before they affect operation, thereby improving reliability without requiring complex real-time adjustments.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration minimizes current imbalances and enhances the reliability of semiconductor modules by ensuring uniform switching characteristics across the modules, reducing stress and improving overall performance.
Implementation Method 1
a busbar that connects respective external terminals of the first semiconductor module and the second semiconductor module in parallel to a common terminal, wherein the second semiconductor module is connected to a connection point on the busbar at which an inductance of a current path to the common terminal is greater than an inductance of a current path from a connection point of the first semiconductor module to the common terminal
Data Source
AI summary
A semiconductor device including a semiconductor module 10A, a semiconductor module 10B that has a lower switching voltage threshold than the semiconductor module 10A, and busbars 331 and 32 that connect the semiconductor module 10A and the semiconductor module 10B in parallel to a common terminal. The semiconductor module 10B is connected at a connection point on the busbar 32 at which the inductance relative to the common terminal is higher than that of the semiconductor module 10A. The semiconductor module 10B with the low threshold voltage is turned ON faster than the semiconductor module 10A with the high threshold voltage for input of a common switching voltage, but can restrict the rising of the current due to the high inductance of the busbar 32, thereby enabling restriction of the current imbalance.