Semiconductor Cache with Rewrite Flags for Eviction Routing
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Solution Overview
Problem
Existing semiconductor devices face challenges in improving cache access efficiency while managing different writing speeds across multiple memory types, leading to increased circuit size and reduced performance.
Innovation Solution
A semiconductor device architecture that includes a first cache with rewrite flags to determine data eviction destinations based on rewrite frequency, storing high-frequency data in a high-speed memory and low-frequency data in a low-speed memory, thereby optimizing data storage and access efficiency without increasing circuit size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If data is stored in a single high-speed memory cache, then data access speed is improved, but circuit size increases and storage capacity is limited
Solution Approach 1:
The cache memory is segmented into multiple banks (first cache bank, second cache bank, third cache bank) with different characteristics. The first and second cache banks use high-speed memory for frequently accessed data, while the third cache bank uses low-speed memory for less frequently accessed data. This segmentation allows the system to maintain high access speeds for critical data while using larger容量的 low-speed memory for bulk storage, thereby increasing total storage capacity without proportionally increasing circuit size.
Solution Approach 2:
Different regions of the cache system are assigned different memory types based on local access patterns. The first and second cache banks (local quality: high-speed) handle hot data with frequent access, while the third cache bank (local quality: low-speed) handles cold data with infrequent access. This local quality differentiation optimizes the overall system by matching memory speed to actual access requirements, improving effective data access speed without requiring all memory to be high-speed.
2Quantity of substance
If multiple memory types with different writing speeds are used, then storage capacity is improved, but managing data placement becomes complex
Solution Approach 1:
The system performs preliminary classification of evicted data before placement. When data is evicted from the first cache, the control unit checks the rewrite flag status beforehand. If the rewrite flag is set (indicating the data was modified), it is placed in the second cache bank (high-speed). If the rewrite flag is not set (indicating clean data), it is placed in the third cache bank (low-speed). This preliminary action simplifies subsequent management by pre-determining the optimal placement location based on data characteristics.
Solution Approach 2:
The data itself carries information about its placement requirements through the rewrite flag. The rewrite flag automatically indicates whether the data should be placed in high-speed or low-speed memory based on whether it was modified. This self-service mechanism eliminates the need for complex external management logic, as the data's own metadata (rewrite flag) directs its placement, thereby reducing device complexity while maintaining effective multi-memory management.
3Productivity
If rewrite frequency is accurately tracked for each data piece, then data placement optimization is improved, but circuit overhead increases
Solution Approach 1:
The system extracts only the essential information needed for optimization - the rewrite flag status - rather than tracking complete rewrite frequency counts. By taking out just the critical binary state (modified or not modified), the system achieves effective data placement optimization without the circuit overhead of maintaining full frequency counters for each data piece. This extraction of essential information maintains productivity while minimizing device complexity.
Data Source
AI summary
A semiconductor device includes: a first cache that includes a first memory and rewrite flags that indicate whether rewriting has been performed for each piece of data held in the first memory; and a second cache that includes a second memory and a third memory that has a lower writing speed than the second memory, stores data evicted from the first cache in the second memory when a rewrite flag corresponding to the evicted data indicates a rewrite state, and stores data evicted from the first cache in the third memory when a rewrite flag corresponding to the evicted data indicates a non-rewrite state.