Semiconductor Die Packaging with Integrated Cap Array
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The integration of a cap element into semiconductor devices increases manufacturing costs and introduces additional risks of defects due to the need for extra process steps in packaging, particularly when the cap serves functions like heat dissipation, electromagnetic shielding, or magnetic shielding.
Innovation Solution
A method of assembling semiconductor devices that involves positioning a cap array structure with cap elements supported by a cap frame structure within a mold chase, where the cap elements are encapsulated along with semiconductor dies in a molding compound, eliminating the need for individual cap element handling and bonding steps, and allowing for simultaneous removal of the cap frame during singulation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If cap elements are integrated into semiconductor devices with extra process steps, then functional benefits (thermal management, EMI reduction) are achieved, but manufacturing costs increase and defect risks are introduced
Solution Approach 1:
The patent combines the cap element attachment process with the semiconductor die encapsulation process into a single integrated operation. The cap elements are positioned on the semiconductor dies before encapsulation, and the molding compound is applied in one step to both the dies and cap elements simultaneously. This merging of processes eliminates separate handling and bonding steps, reducing manufacturing complexity while maintaining the functional benefits of cap elements for thermal management and electromagnetic interference reduction.
2Manufacturing precision
If individual cap element handling and bonding steps are performed, then precise positioning is achieved, but manufacturing time and complexity increase
Solution Approach 1:
The patent employs preliminary action by pre-positioning cap elements on semiconductor dies in an array configuration before the encapsulation process. The cap elements are arranged in correspondence with the semiconductor dies, and alignment features are established in advance. During encapsulation, the molding compound is applied to both the dies and pre-positioned cap elements simultaneously, eliminating the need for individual handling and bonding operations. This approach maintains precise positioning while significantly improving manufacturing efficiency.
3Device complexity
If cap elements are integrated into the encapsulation process, then manufacturing complexity is reduced, but control over individual cap element placement may be compromised
Solution Approach 1:
The patent applies segmentation by dividing the manufacturing process into distinct stages: cap element array preparation, die array preparation, and simultaneous encapsulation. The cap elements are prepared as a separate array with alignment features, and the semiconductor dies are prepared as a separate array. During encapsulation, these pre-prepared arrays are positioned and enclosed together in one operation. This segmentation allows for controlled preparation of each component while achieving simplified integrated packaging.
Data Source
AI summary
A method of assembling semiconductor devices includes placing an array of semiconductor dies on a die support. A cap array structure is provided that has a corresponding array of caps supported by a cap frame structure. The cap array structure and the array of semiconductor dies on the die support are aligned, with the caps extending over corresponding semiconductor dies, in a mold chase. The array of semiconductor dies and the array of caps are encapsulated with a molding compound in the mold chase. The encapsulated units of the semiconductor dies with the corresponding caps are removed from the mold chase and singulated. Singulating the encapsulated units may include removing the cap frame structure from the encapsulated units.