Semiconductor Capacitor Lower Electrode with Bent Portion for High Integration
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Solution Overview
Problem
Semiconductor devices with capacitors face challenges in maintaining or increasing electrostatic capacity while reducing the device area, which is essential for high integration and performance in modern industrial and multimedia applications.
Innovation Solution
A method of manufacturing semiconductor devices that involves forming a bit line on a substrate, creating interlayer insulating layers, and using a sequential epitaxial growth method to form a silicon epitaxial layer between the active region and the capacitor, allowing for a lower electrode with a bent portion due to varying hole widths, thereby increasing the capacitor's area and reducing connection resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the area of the semiconductor device is reduced to achieve high integration, then the electrostatic capacity of the capacitor deteriorates
Solution Approach 1:
The lower electrode is designed with a bent portion that extends in the vertical dimension, allowing the electrode to reach deeper into the first hole while maintaining a compact footprint on the substrate. This vertical extension increases the effective surface area of the lower electrode without proportionally increasing the planar device area, thereby maintaining electrostatic capacity while achieving high integration density.
Solution Approach 2:
The lower electrode with its bent portion is nested within the first hole structure, maximizing the use of the available vertical space. The bent portion allows the electrode to be positioned at multiple levels within the hole, effectively nesting the electrode structure to increase capacity without expanding the overall device footprint.
2Quantity of substance
If the width of the first hole is increased to increase capacitor area, then the device area increases
Solution Approach 1:
Instead of increasing the horizontal width of the first hole, the solution transitions to the vertical dimension by creating a bent portion in the lower electrode that extends deeper into the hole. This allows the capacitor's effective area to increase through vertical placement rather than horizontal expansion, maintaining compact device footprint while increasing capacity.
3Reliability
If the connection between the lower electrode and active region is improved, then the leakage current increases
Solution Approach 1:
An epitaxial layer is introduced as an intermediary material between the lower electrode and the active region. This epitaxial layer provides a graded transition in material properties, improving the electrical connection and reducing contact resistance while simultaneously acting as a barrier to prevent direct leakage paths between the electrode and the active region, thus reducing leakage current.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the integration density and performance of semiconductor devices by increasing the electrostatic capacity of capacitors while minimizing area usage and reducing leakage current, thus improving the reliability and refresh characteristics of the devices.
Implementation Method 1
forming an epitaxial layer on a portion of the active region, which is exposed at a lower surface of the first hole
Implementation Method 2
The dummy contact layer may be removed using a wet etching process using a solution including any one of NH4OH, KOH, NH2OH, and tetramethylammonium hydroxide (TMAH)
Data Source
AI summary
A method of manufacturing a semiconductor device includes forming a bit line on a substrate comprising an active region; forming an interlayer insulating layer covering the bit line on the substrate; forming a first hole at a location of the active region through the interlayer insulating layer; forming a dummy contact layer by filling the first hole; forming a mold layer on the interlayer insulating layer and the dummy contact layer; forming a second hole at a location of the dummy contact layer through the mold layer; removing the dummy contact layer in the first hole through the second hole; forming an epitaxial layer on a portion of the active region, which is exposed at a lower surface of the first hole; and forming a lower electrode on internal surfaces of the first hole and the second hole.