Semiconductor Capacitor With Depth-Varied Electrodes

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Solution Overview

Problem

Semiconductor devices face challenges in reducing the area occupied by capacitors while maintaining efficiency, as decreasing the capacitor area can lead to deteriorated performance.

Innovation Solution

The semiconductor device incorporates first and second electrodes formed within insulating layers, with the lower surface of the second electrode positioned higher than the first electrode, allowing for a shorter distance between them and thus reducing the occupied area while improving capacitor efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of moving object

If the area occupied by the capacitor is decreased to achieve high integration, then the integration density is improved, but the capacitor efficiency deteriorates

Engineering Contradiction:
Improvecapacitor areaVSAvoidcapacitor efficiency
Core Design Contradiction:
Area of moving objectVSReliability

Solution Approach 1:

The patent transitions from planar capacitor configuration to a three-dimensional structure where electrodes are positioned at different depths within the insulating layer. The first electrode extends deeper into the insulating layer while the second electrode is positioned higher, creating a vertical stacking arrangement that reduces horizontal area occupation while maintaining adequate electrode separation for efficient capacitance.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The capacitor structure embeds electrodes at different depth levels within the same insulating layer volume. The first electrode is nested deeper in the insulating layer while the second electrode is positioned higher, creating a nested vertical arrangement that maximizes space utilization and reduces the horizontal footprint of the capacitor.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Reliability

If the distance between electrodes is reduced to improve capacitor efficiency, then the capacitance increases, but the area occupied by the capacitor increases

Engineering Contradiction:
Improvecapacitor efficiencyVSAvoidcapacitor area
Core Design Contradiction:
ReliabilityVSArea of moving object

Solution Approach 1:

The patent resolves the area-efficiency contradiction by moving the electrode separation distance measurement from the horizontal plane to the vertical dimension. Electrodes are positioned at different depths within the insulating layer, allowing short separation distances for high capacitance efficiency while maintaining compact horizontal footprint through vertical stacking.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS9691841B2Semiconductor device
Publication Date: 2017.06.27 SK HYNIX INC
  • US9691841B2 patent drawing
  • US9691841B2 patent drawing
  • US9691841B2 patent drawing

AI summary

A semiconductor device includes an insulating layer formed on a substrate, and a capacitor including first and second electrodes formed in the insulating layer, wherein a lower surface of the first electrode is formed to have a greater depth than a lower surface of the second electrode in the insulating layer.