Semiconductor Capacitor Structure Preventing Internal Electrode Bending

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Solution Overview

Problem

In the manufacturing of Dynamic Random Access Memory (DRAM), internal electrodes tend to bend and cause short circuits due to stress generated by the removal of the sacrifice layer, especially when the capacitor via has a large height, leading to capacitance value issues.

Innovation Solution

A method is developed to form a semiconductor structure by creating a semiconductor structure with a base, external electrode layers, a dielectric layer, internal electrode layers, and conductive layers, where the external electrode layers and dielectric layers support the internal electrode layers to prevent bending and short circuits, involving specific etching processes and layer formations to maintain mechanical stability and uniform morphology.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the capacitor via has a large height to increase capacitance value, then the capacitance value is improved, but the internal electrode bends and causes short circuit

Engineering Contradiction:
Improvecapacitance valueVSAvoidshort circuit prevention
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The support layer is formed on the base before forming the capacitor via, providing preliminary structural support. The external electrode layers are formed on the sidewalls of the capacitor via before filling the internal electrode, creating a support structure that prevents bending during subsequent processing steps.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The external electrode layers act as intermediary structures between the support layer and the internal electrode layer. These intermediary layers provide mechanical support to the internal electrode, preventing it from bending while maintaining the required capacitance value through the via height.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of manufacture

If the internal electrode is formed without external support, then the manufacturing process is simplified, but the internal electrode bends due to stress from sacrifice layer removal

Engineering Contradiction:
Improveprocess simplicityVSAvoidinternal electrode straightness
Core Design Contradiction:
Ease of manufactureVSStability of the object's composition

Solution Approach 1:

The external electrode layers are formed on the sidewalls of the capacitor via before the internal electrode is deposited. This preliminary action creates a support structure that maintains internal electrode straightness during and after the sacrifice layer removal process, without significantly complicating the manufacturing flow.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The formation of external electrode layers changes the mechanical parameters of the capacitor structure, adding structural support that counteracts the stress-induced bending. This parameter change (adding sidewall electrodes) maintains ease of manufacture while improving structural stability during the critical removal of the sacrifice layer.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20230065654A1Semiconductor structure and method for forming semiconductor structure
Publication Date: 2023.03.02 CHANGXIN MEMORY TECH INC
  • US20230065654A1 patent drawing
  • US20230065654A1 patent drawing
  • US20230065654A1 patent drawing

AI summary

A semiconductor structure and a method for forming semiconductor structure are provided. The method includes: after a plurality of capacitor vias are formed in a support layer and a sacrifice layer, external electrode layers are formed on sidewall surfaces of the capacitor vias; a dielectric layer is formed on a sidewall surface of each external electrode layer; remaining sacrifice layer between the external electrode layers is removed to form a cavity at a position where remaining sacrifice layer has been removed; an internal electrode layer is formed on a surface of the dielectric layer and a bottom surface of each capacitor via; a first conductive layer completely filling the cavity is formed, where the first conductive layer is in contact with a respective one of the external electrode layers; and a second conductive layer completely filling a remaining part of each capacitor via is formed on the internal electrode layer.