Semiconductor Capping Structure Thickness Uniformity

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Solution Overview

Problem

Conventional semiconductor structures face challenges in improving channel carrier mobility and uniformity of capping layers, leading to performance issues due to varying thickness and resistance between crystal planes, affecting transistor integration and performance.

Innovation Solution

A semiconductor structure and fabrication method involving an epitaxial layer with different crystal planes and a capping structure where the initial capping layer is formed with varying thicknesses, and then etched to achieve uniformity, accompanied by the formation of a metallized compound layer and electrode to enhance connectivity and reduce resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If an initial capping layer is formed on epitaxial layers with different crystal planes, then the capping layer can be formed to cover both regions, but the thickness of the capping layer becomes non-uniform due to different etching rates on different crystal planes

Engineering Contradiction:
Improvecapping layer thickness uniformityVSAvoidcapping layer formation process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by forming a first capping layer before the second capping layer, where the first capping layer serves as a foundation that can be selectively removed or modified. This preliminary structure allows for subsequent processing steps to achieve uniform final thickness despite different underlying crystal planes, as the first capping layer can be etched back to expose different amounts of underlying material that will be covered by the second capping layer.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements local quality by treating different regions of the epitaxial layer differently. Regions with different crystal planes (e.g., <100> and <111> planes) receive different amounts of capping layer material or undergo different etching processes. This allows each region to be compensated for its specific etching rate, achieving overall uniformity while accounting for local variations in crystal orientation.

Inventive Principle:
Principle #3Local quality

2Reliability

If strained silicon technology is used to improve channel carrier mobility, then carrier mobility increases, but the process complexity and manufacturing difficulty increase

Engineering Contradiction:
Improvechannel carrier mobilityVSAvoidfabrication process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies parameter changes by modifying the crystal plane orientation of the epitaxial layer regions. By growing epitaxial layers with specific crystal planes (such as <111> or <100> planes) in different regions, the carrier mobility is enhanced through the inherent properties of these crystal orientations. This approach achieves mobility improvement through material parameter selection rather than complex strain engineering processes.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent uses composite materials by combining epitaxial layers with different crystal plane orientations in a single device structure. Different regions of the semiconductor device utilize epitaxial layers grown on different crystal planes, creating a composite structure that leverages the advantages of each orientation for carrier mobility while maintaining a relatively straightforward fabrication process compared to conventional strained silicon approaches.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method results in improved performance by ensuring uniform thickness and resistance of the capping structure, enhancing the semiconductor structure's efficiency and integration by addressing the non-uniformity and mobility issues.

Implementation Method 1

an epitaxial layer is formed in a substrate. The epitaxial layer includes a first region and a second region, the first region of the epitaxial layer has a first crystal plane, the second region of the epitaxial layer has a second crystal plane

Methodology Applied
Scientific EffectEpitaxy: Epitaxy

Implementation Method 2

etching the initial capping layer to reduce a thickness difference between the initial capping layer on the first region and the initial capping layer on the second region

Methodology Applied
Scientific EffectEtching:

Data Source

PatentUS10446666B2Semiconductor structure and fabrication method thereof
Publication Date: 2019.10.15 SEMICON MFG INT (SHANGHAI) CORP
  • US10446666B2 patent drawing
  • US10446666B2 patent drawing
  • US10446666B2 patent drawing

AI summary

A semiconductor structure and a method for fabricating the semiconductor structure are provided. The method includes forming an epitaxial layer in a substrate. The epitaxial layer includes a first region having a first crystal plane and a second region having a second crystal plane, and indices of lattice planes of the first crystal plane and the second crystal plane are different. The method also includes forming a capping structure including one or more capping layers on the first region and the second region. Forming the capping layer includes forming an initial capping layer having different thicknesses on the first region and the second region; and etching the initial capping layer to reduce a thickness difference between the initial capping layer on the first region and the initial capping layer on the second region. Further, the method includes forming an electrode electrically connected to the capping structure.