Semiconductor Carrier Assembly Using Solder Self-Alignment
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Solution Overview
Problem
The assembly of complex semiconductor arrangements with high accuracy and reduced assembly time is challenging due to the small size and high density of semiconductor components, requiring precise image recognition and positioning, which is time-consuming in existing methods.
Innovation Solution
A method involving a solder-assisted self-adjustment process where semiconductor components are initially attached to an intermediate carrier, aligned with solder pads on a substrate, and connected by liquefied solder, utilizing surface tension for precise positioning, with fewer mechanical stops and adhesive adjustments for final attachment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If individual chips are manually positioned and soldered one by one, then positioning accuracy can be achieved, but assembly time becomes excessively long
Solution Approach 1:
Multiple individual chip assembly operations are merged into a single parallel process by attaching multiple chips to a common intermediate carrier and transferring them together to the substrate in one placement operation, followed by simultaneous soldering of all chips
Solution Approach 2:
Multiple chips are preliminarily attached to an intermediate carrier with predefined positions before the actual assembly to the substrate. This preliminary arrangement allows all chips to be positioned and soldered in parallel, dramatically reducing total assembly time while maintaining individual positioning accuracy
2Area of stationary object
If assembly density is increased to reduce overall device size, then device compactness is improved, but image recognition and positioning accuracy become more difficult to achieve
Solution Approach 1:
An intermediate carrier is introduced as a mediator that temporarily holds multiple chips in precisely defined positions. This carrier serves as a reference frame that simplifies the positioning task, allowing high-density chip arrangements to be assembled with maintained accuracy through the carrier's predefined geometry
Solution Approach 2:
Multiple high-density chip placements are combined into a single parallel assembly operation from the intermediate carrier, enabling the placement machine to handle all chips simultaneously with consistent positioning accuracy despite high density requirements
3Manufacturing precision
If more mechanical stops and adhesive adjustments are used for precise positioning, then positioning accuracy is improved, but assembly complexity and time increase
Solution Approach 1:
The intermediate carrier is designed with built-in positional references and alignment features that enable self-alignment with the substrate during the assembly process. This self-aligning mechanism eliminates the need for complex external positioning systems, multiple adjustment steps, or numerous mechanical stops, thereby reducing assembly complexity while maintaining high positioning precision
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method reduces assembly time and effort while maintaining high positioning accuracy, allowing for efficient attachment of multiple components with minimal manual intervention and reduced reliance on optical alignment.
Implementation Method 1
the surface tension of the solder material between the respective solder pads of the substrate and the semiconductor components sets a predetermined preferred position of the intermediate carrier relative to the substrate
Data Source
AI summary
Disclosed herein is a method for manufacturing a semiconductor comprising mechanically connecting one or more separate semiconductor components to a common intermediate carrier, arranging the intermediate carrier with respect to a substrate so that, at least for a majority of the semiconductor components, at least one solder pad of a particular semiconductor component lies opposite a solder pad of the substrate associated therewith forming a solder joint, and connecting mutually associated solder pads of the one or more semiconductor components and the substrate by melting and solidifying a solder material arranged between the mutually associated solder pads. A surface tension of the solder material between the mutually associated solder pads of the substrate and the one or more semiconductor components sets a predetermined position of the intermediate carrier relative to the substrate, in which the one or more semiconductor components assume a target position relative to the substrate.