Semiconductor Package Cavity Design for Thickness Reduction
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Solution Overview
Problem
The miniaturization of semiconductor device packages is hindered by the thickness of stacked die structures, and existing methods for embedding semiconductor dies in substrates often result in inadequate molding and contamination of bonding pads, while the use of interposers increases costs and thickness.
Innovation Solution
A semiconductor device package design featuring a substrate with a cavity and recessed area, where a first semiconductor die is bonded to the substrate and a second die is partially inserted into the cavity, encapsulated by a molding material to form an encapsulation layer that covers the second die and protrudes over the substrate surface, eliminating the need for interposers and improving molding quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of stationary object
If semiconductor dies are embedded in substrate to reduce thickness, then package thickness is reduced, but molding quality deteriorates and bonding pads become contaminated
Solution Approach 1:
The substrate is segmented into different regions: a cavity region where the second die is partially embedded, and a bonding pad region that remains exposed. This segmentation allows the second die to be positioned in the cavity while keeping bonding pads accessible and uncontaminated, resolving the contradiction between thickness reduction and molding quality
Solution Approach 2:
The cavity acts as an intermediary structure that accommodates the second die without requiring complete substrate embedding. This intermediate solution enables partial embedding that reduces thickness while maintaining proper molding quality and bonding pad accessibility
2Reliability
If interposer is included to interconnect semiconductor dies, then electrical connection is improved, but package thickness and cost increase
Solution Approach 1:
The interposer component is completely removed from the design. Instead of using an interposer for electrical interconnection, the patent directly bonds the first and second semiconductor dies to each other through wire bonds or other direct bonding methods, eliminating the thickness and cost contribution of the interposer while maintaining electrical connectivity
Solution Approach 2:
The electrical interconnection function previously performed by the interposer is merged directly into the die-to-die bonding interface. The first and second dies are electrically connected through direct bonding structures, combining the mechanical support and electrical interconnection functions into a single integrated interface without requiring a separate interposer layer
Data Source
AI summary
A semiconductor device package includes a substrate, a stacked structure and an encapsulation layer. The substrate includes a circuit layer, a first surface and a second surface opposite to the first surface. The substrate defines at least one cavity through the substrate. The stacked structure includes a first semiconductor die disposed on the first surface and electrically connected on the circuit layer, and at least one second semiconductor die stacked on the first semiconductor die and electrically connected to the first semiconductor die. The second semiconductor die is at least partially inserted into the cavity. The encapsulation layer is disposed in the cavity and at least entirely encapsulating the second semiconductor die.