Semiconductor Cavity Structure for Reliable Stacked Package Connection

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Solution Overview

Problem

Current semiconductor package configurations face challenges in reducing package height and terminal pitch while ensuring connection reliability, as the thickness of semiconductor chips needs to be excessively reduced for smaller terminal pitches, leading to technical difficulties in grinding and potential chip breakage, and insufficient strength at connection points due to reduced terminal size.

Innovation Solution

A semiconductor device with a stacked package structure featuring an interconnect substrate with a cavity structure and sloped portions at the corner of the cavity, allowing for stable underfill material injection and connection without relying on the thickness of the semiconductor chip, using a sealing material that can fill gaps between packages and provide strength.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the terminal pitch is reduced to increase the number of terminals at the connection portion, then the density of semiconductor devices is improved, but the stand-off distance becomes insufficient and connection reliability deteriorates

Engineering Contradiction:
Improvenumber of terminalsVSAvoidconnection reliability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The invention transitions from a conventional flat package structure to a three-dimensional stacked package structure. By stacking multiple packages vertically, the connection density increases without reducing the terminal pitch on each individual package, thereby maintaining connection reliability while achieving higher overall density.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The invention employs a nested structure where multiple semiconductor packages are stacked one on top of another, with each package containing a semiconductor element mounted on an interconnect substrate. This nesting approach allows multiple functional units to be integrated in a compact vertical arrangement.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Length of stationary object

If the thickness of the semiconductor chip is reduced to achieve smaller stand-off distance, then the package height is reduced, but the chip becomes prone to breakage during grinding and assembly

Engineering Contradiction:
Improvepackage heightVSAvoidchip strength
Core Design Contradiction:
Length of stationary objectVSStrength

Solution Approach 1:

The invention divides the package structure into separate modular components: the semiconductor element, the interconnect substrate, and the encapsulating resin. This segmentation allows each component to be optimized independently, with the interconnect substrate providing mechanical support that eliminates the need for excessive chip thinning.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The interconnect substrate acts as an intermediary between the semiconductor element and the package exterior. It provides a robust mechanical foundation that supports the semiconductor element without requiring the element itself to be thinned to extreme degrees, thereby maintaining chip strength.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Length of stationary object

If the connection height is reduced to minimize stand-off distance, then the package size is reduced, but the injection performance of epoxy resin deteriorates

Engineering Contradiction:
Improveconnection heightVSAvoidepoxy resin injection performance
Core Design Contradiction:
Length of stationary objectVSEase of manufacture

Solution Approach 1:

The invention performs preliminary actions by first mounting the semiconductor element on the interconnect substrate and forming the encapsulating resin structure before final package assembly. This sequence ensures adequate space for epoxy resin injection and underfill material application, maintaining manufacturing ease while achieving compact dimensions.

Inventive Principle:
Principle #10Preliminary action

4Quantity of substance

If the terminal pitch is reduced, then the density is improved, but the solder ball diameter must be reduced leading to insufficient connection strength

Engineering Contradiction:
Improveterminal densityVSAvoidconnection strength
Core Design Contradiction:
Quantity of substanceVSStrength

Solution Approach 1:

By transitioning to a three-dimensional stacked architecture, the invention achieves high terminal density through vertical stacking rather than horizontal packing. This allows larger solder balls to be used at each connection point while maintaining overall high density through the stacked configuration.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS8330266B2Semiconductor device
Publication Date: 2012.12.11 ADEIA SEMICONDUCTOR ADVANCED TECHNOLOGIES INC
  • US8330266B2 patent drawing
  • US8330266B2 patent drawing
  • US8330266B2 patent drawing

AI summary

A semiconductor device includes: a first semiconductor device including an interconnect substrate having a cavity structure and a semiconductor element mounted on a bottom part of the cavity structure; and a second semiconductor device provided on and connected to the first semiconductor device via connection terminals. A sealing material is provided between the first semiconductor device and the second semiconductor device. A sloped portion is formed, at a corner portion at which the bottom part and a side wall of the cavity structure in the first semiconductor device meets, to be sloped toward a center part of the cavity structure and have a tapered shape which becomes continuously wider in the direction from an upper part to a lower part.