Semiconductor Package Cavity Stacking for Smaller, Reliable Assembly
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Solution Overview
Problem
Existing semiconductor packages and manufacturing methods are inadequate, leading to excess cost, decreased reliability, low performance, and large package sizes.
Innovation Solution
A semiconductor device comprising a substrate with conductive pads and a cavity, a base electronic component with inner and outer short bumps and tall bumps, and a mounted electronic component coupled to the inner short bumps, where the tall bumps are coupled to the substrate's conductive pads and the mounted component is located in the substrate cavity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If conventional semiconductor packages are used, then manufacturing is simpler, but package size is too large
Solution Approach 1:
The patent transitions from a conventional planar package layout to a three-dimensional stacked architecture. Multiple electronic components are vertically stacked and interconnected through tall bumps and substrate cavities, enabling compact packaging by utilizing the vertical dimension rather than expanding horizontally.
Solution Approach 2:
The patent implements nesting by placing electronic components within substrate cavities and stacking components vertically. The mounted electronic component is positioned within the substrate cavity, and multiple layers of components are nested together through vertical interconnection, maximizing space utilization and reducing overall package volume.
2Reliability
If conventional semiconductor packages are used, then manufacturing process is traditional, but reliability is decreased
Solution Approach 1:
The patent employs preliminary action by pre-forming substrate cavities and positioning structures before component assembly. The substrate is prepared with pre-defined cavities and conductive pads, and components are pre-positioned on the substrate, ensuring accurate alignment and reducing assembly complexity despite the advanced three-dimensional architecture.
3Productivity
If conventional semiconductor packages are used, then cost is lower, but performance is relatively low
Solution Approach 1:
The patent applies segmentation by dividing the package into distinct functional modules: substrate with cavities, base electronic components, mounted electronic components, and interconnection structures. This modular segmentation enables independent optimization of each component and facilitates parallel manufacturing processes, improving overall device performance while managing manufacturing complexity.
Data Source
AI summary
An exemplary semiconductor device can comprise (a) a substrate comprising a substrate dielectric structure between the substrate top side and the substrate bottom side, conductive pads at the substrate bottom side, and a substrate cavity through the substrate dielectric structure, (b) a base electronic component comprising inner short bumps; outer short bumps bounding a perimeter around the inner short bumps, and tall bumps between the outer short bumps and an edge of the base component top side, and (c) a mounted electronic component coupled to the inner short bumps of the base electronic component. The tall bumps of the base component can be coupled to the conductive pads of the substrate. The mounted electronic component can be located in the substrate cavity. The substrate bottom side can cover at least a portion of the outer short bumps of the base electronic component. Other examples and related methods are disclosed herein.