Semiconductor Cell Blocks with Non-Integer Layer Heights

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Solution Overview

Problem

Existing semiconductor cell blocks typically have logic cells of uniform or integer multiple heights, limiting their ability to support diverse device architectures and drive cells, and do not efficiently utilize layer stacking to optimize cell heights.

Innovation Solution

A semiconductor cell block design featuring layers of varying heights, where the second height is a non-integer multiple of the first height, allowing for both smaller and larger drive cells, and enabling different device architectures within the same block, with a method for generating layouts using placement and routing tools to optimize layer arrangement and connectivity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If semiconductor logic cells have uniform or integer multiple heights, then manufacturing and routing are simplified, but the ability to support diverse device architectures and optimize cell heights is limited

Engineering Contradiction:
Improveability to support diverse device architecturesVSAvoidlayer height variation complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The semiconductor cell block is segmented into multiple layers with different height characteristics. First layers have a first height and second layers have a second height that is a non-integer multiple of the first height. This segmentation allows different device architectures to be placed in appropriate layers, supporting diverse configurations while maintaining manageable complexity through systematic layer organization.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different layers are assigned different height properties to match specific device architecture requirements. The first layers and second layers have distinct height characteristics optimized for different cell types. This local quality approach allows each layer to be tailored for specific functions, enhancing adaptability while keeping the overall design systematic rather than chaotic.

Inventive Principle:
Principle #3Local quality

2Productivity

If all logic cells have the same height, then layout design and routing are easier, but layer stacking efficiency and performance optimization are reduced

Engineering Contradiction:
Improvelayer stacking efficiencyVSAvoidlayout design ease
Core Design Contradiction:
ProductivityVSEase of operation

Solution Approach 1:

The design moves beyond the traditional single-height constraint by introducing vertical dimensionality variation through multiple layer types. First layers and second layers have different heights, creating a multi-level structure that improves layer stacking efficiency. This dimensional approach allows better utilization of vertical space while maintaining routing feasibility through systematic layer organization.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The layer height structure is made dynamic rather than static, with different layers having different height properties that can be selectively applied. The non-integer multiple relationship between first and second layer heights allows flexible adaptation to different device architectures while maintaining a systematic framework that doesn't completely abandon the simplicity of uniform sizing.

Inventive Principle:
Principle #15Dynamics

3Adaptability or versatility

If non-integer multiple layer heights are used, then diverse drive cells and device architectures are supported, but manufacturing precision requirements increase

Engineering Contradiction:
Improvesupport for different drive cellsVSAvoidlayer height precision
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The layer height parameter is changed from a single uniform value to multiple discrete values with a specific relationship (non-integer multiple). First layers have height H1 and second layers have height H2 where H2 = n×H1 (n is non-integer). This parameter change enables support for different drive cells while maintaining manufacturing feasibility through the defined mathematical relationship between layer heights.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11552067B2Semiconductor cell blocks having non-integer multiple of cell heights
Publication Date: 2023.01.10 SAMSUNG ELECTRONICS CO LTD
  • US11552067B2 patent drawing
  • US11552067B2 patent drawing
  • US11552067B2 patent drawing

AI summary

A semiconductor cell block includes a series of layers arranged in a stack. The layers include one or more first layers each having a first height and one or more second layers each having a second height. The second height is larger than the first height, and the second height is a non-integer multiple of the first height. The semiconductor cell block also includes a first semiconductor logic cell having a first cell height in one of the series of layers, and a second semiconductor logic cell having a second cell height in one of the series of layers. The second cell height is larger than the first cell height, and the second cell height is a non-integer value multiple of the first cell height.