Power Semiconductor Cell Structure Thermal Uniformity
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Solution Overview
Problem
Power semiconductor devices face reduced power cycle life due to uneven temperature distribution across the semiconductor substrate, leading to increased maximum joint temperature and temperature difference, which results in decreased reliability.
Innovation Solution
The solution involves configuring the cell structures in power semiconductor devices such that the central portion has a lower current carrying ability compared to the peripheral portion, with specific design parameters like threshold voltage, channel width, channel length, and diffusion resistance, to achieve uniform temperature distribution and reduce maximum joint temperature.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If the cell structures are configured with uniform current carrying ability across the semiconductor substrate, then the device can handle higher overall current, but the temperature distribution becomes uneven leading to reduced power cycle life
Solution Approach 1:
The patent applies local quality by configuring cell structures with different current carrying abilities in different regions of the semiconductor substrate. Specifically, the central portion has cell structures with lower current carrying ability (larger threshold voltage, smaller channel width, or longer channel length) while the peripheral portion has cell structures with higher current carrying ability, creating a non-uniform distribution that addresses thermal management needs.
Solution Approach 2:
The patent changes physical parameters of the cell structures to control current carrying ability spatially. By varying threshold voltage, channel width, channel length, or diffusion resistance parameters across different regions, the invention achieves different current carrying abilities in central versus peripheral portions, thereby controlling temperature distribution.
2Power
If the current carrying ability is increased in the central portion, then the overall power capability improves, but the maximum joint temperature increases and power cycle life decreases
Solution Approach 1:
The patent makes the central portion have different (lower) current carrying ability compared to the peripheral portion, creating a non-uniform current density distribution that reduces heat generation at the central wire joining portions where thermal management is more challenging.
3Temperature
If the current carrying ability is increased in the peripheral portion, then the temperature distribution uniformity improves, but the overall current handling capability may be limited
Solution Approach 1:
The patent optimizes each region's current carrying ability according to its specific thermal characteristics - peripheral regions with better heat dissipation have higher current carrying ability, while central regions with poorer heat dissipation have lower current carrying ability, achieving overall system optimization.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the power cycle life by maintaining a lower joint temperature and reducing the temperature difference across the semiconductor substrate, thereby improving the device's reliability and performance.
Implementation Method 1
a current gathers at connection portions of the emitter wires so that a temperature Tja of the emitter wire connection portions is higher than a temperature Tjb of their surrounding region
Implementation Method 2
the current carrying abilities of the plurality of cell structures change according to a thermal resistance at the main surface of the semiconductor substrate
Data Source
Figure 1~2
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AI summary
A plurality of cell structures of a vertical power device are formed at a semiconductor substrate (1). One cell structure included in the plurality of cell structures and located in a central portion CR of the main surface has a lower current carrying ability than the other cell structure included in the plurality of cell structures and located in an outer peripheral portion PR of the main surface. This provides a power semiconductor device having a long power cycle life.