Semiconductor Channel Structure for Lower Drain Electric Field

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Solution Overview

Problem

The challenge is to reduce the lateral electric field near the drain of a semiconductor device while maintaining sufficient operating current performance, as high carrier concentration in the doped region leads to device deterioration and insufficient current.

Innovation Solution

The semiconductor device is designed with a semiconductor structure comprising thick and thin portions, where the gate overlaps only certain portions, reducing the lateral electric field and maintaining sufficient operating current by adjusting resistivity in the source and drain regions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If the carrier concentration of the doped region is high, then the operating current is sufficient, but a high lateral electric field appears near the drain causing device deterioration

Engineering Contradiction:
Improveoperating currentVSAvoiddevice deterioration
Core Design Contradiction:
PowerVSReliability

Solution Approach 1:

The patent applies local quality by creating a non-uniform thickness profile in the semiconductor layer, with a first thick portion under the source, a second thick portion under the drain, and a thin portion in between. This local variation in thickness allows different regions to have different electrical properties: the thick portions maintain high carrier concentration for sufficient current, while the thin portion reduces the lateral electric field near the drain, preventing device deterioration.

Inventive Principle:
Principle #3Local quality

2Reliability

If the carrier concentration of the doped region is reduced to avoid device deterioration, then the lateral electric field is reduced, but the operating current becomes insufficient

Engineering Contradiction:
Improvedevice deteriorationVSAvoidoperating current
Core Design Contradiction:
ReliabilityVSPower

Solution Approach 1:

The patent resolves this contradiction by making different regions of the semiconductor layer have different thicknesses. The first and second thick portions maintain high carrier concentration to ensure sufficient operating current, while the thin portion located between them reduces the lateral electric field to prevent device deterioration. This local differentiation allows simultaneous optimization of both current and reliability.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The semiconductor layer is segmented into three distinct regions with different thicknesses: a first thick portion, a thin portion, and a second thick portion. This segmentation allows each region to serve a specific function - the thick portions for current conduction and the thin portion for electric field management - thereby resolving the contradiction between operating current and device reliability.

Inventive Principle:
Principle #1Segmentation

3Manufacturing precision

If the gate overlaps the entire thin portion, then the channel control is improved, but the lateral electric field near the drain increases

Engineering Contradiction:
Improvechannel controlVSAvoidlateral electric field
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The gate structure is designed with asymmetric overlap: it overlaps the first thick portion and part of the thin portion to maintain channel control, but deliberately does not overlap the second thick portion to reduce the lateral electric field near the drain. This local differentiation in gate coverage optimizes both channel control and reliability.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12439647B2Semiconductor device and manufacturing method thereof
Publication Date: 2025.10.07 AU OPTRONICS CORP
  • US12439647B2 patent drawing
  • US12439647B2 patent drawing
  • US12439647B2 patent drawing

AI summary

A semiconductor device includes a substrate, a semiconductor structure, a gate dielectric layer, a first gate, a source and a drain. The semiconductor structure is disposed above the substrate. The semiconductor structure includes a first thick portion, a second thick portion, and a thin portion between the first thick portion and the second thick portion. The gate dielectric layer is disposed on the semiconductor structure. The first gate is disposed on the gate dielectric layer. The first gate overlaps a portion of the first thick portion and a portion of the thin portion. The first gate does not overlap another portion of the thin portion and the second thick portion. The source is electrically connected to the first thick portion. The drain is electrically connected to the second thick portion.