Semiconductor Device Channel Extension Region

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Solution Overview

Problem

Conventional high-voltage semiconductor devices require complex structures and high fabrication processes due to the combination of LDMOS and EDMOS transistors, making them difficult to implement and costly to produce, with limited flexibility in using either transistor type for desired operating characteristics.

Innovation Solution

A semiconductor device with a channel extension region that allows the LDMOS transistor to be used as an analog device by varying its channel length, and an impurity region that decreases the effective channel length of the EDMOS transistor to match that of the LDMOS, enabling both transistors to be used as switching devices while maintaining breakdown voltage characteristics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If LDMOS transistor uses double diffusion method to form short channel region, then switching device performance is improved, but channel length cannot be varied limiting analog device usage

Engineering Contradiction:
Improveswitching device performanceVSAvoidchannel length variability
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The channel region is segmented into two distinct parts: a first channel region formed by double diffusion method with short channel length for switching operation, and a second channel region formed by epitaxial growth with adjustable channel length for analog operation. This segmentation allows each region to be optimized independently for its specific function, resolving the contradiction between switching performance and analog adaptability.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If EDMOS transistor is used as analog device with variable channel length, then analog device functionality is achieved, but structure complexity and fabrication difficulty increase

Engineering Contradiction:
Improveanalog device functionalityVSAvoidstructure complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The LDMOS transistor is designed with dual functionality by incorporating both a first channel region for switching operation and a second channel region for analog operation. The gate electrode can control current flow through either region depending on the applied voltage, allowing a single device structure to perform both switching and analog functions, thereby eliminating the need for separate EDMOS transistor structures.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Productivity

If EDMOS transistor channel length is decreased to match LDMOS, then both transistors can be used as switching devices, but breakdown voltage characteristics deteriorate

Engineering Contradiction:
Improveswitching device capabilityVSAvoidbreakdown voltage characteristics
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies different quality characteristics to different regions of the transistor. The first channel region has short channel length optimized for switching performance, while the second channel region has longer channel length optimized for breakdown voltage characteristics. By locally optimizing each region's properties rather than uniformly designing the entire channel, both switching capability and breakdown voltage reliability are maintained.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Simplifies the structure of high-voltage semiconductor devices, reduces production costs and time, and improves current characteristics by providing regions with different threshold voltage levels, allowing for increased on-current and decreased off-current.

Implementation Method 1

The channel region C1 of the LDMOS transistor is formed by selecting impurities having different diffusion characteristic and applying a double diffusion method

Methodology Applied
Scientific EffectDiffusion: Diffusion

Implementation Method 2

an impurity region that decreases the effective channel length of the EDMOS transistor to match that of the LDMOS

Methodology Applied
Scientific EffectImpurity doping: Dopants

Data Source

PatentUS9099557B2Semiconductor device
Publication Date: 2015.08.04 SK KEYFOUNDRY INC
  • US9099557B2 patent drawing
  • US9099557B2 patent drawing
  • US9099557B2 patent drawing

AI summary

A semiconductor device includes a second conductive-type well configured over a substrate, a first conductive-type body region configured over the second conductive-type well, a gate electrode which overlaps a portion of the first conductive-type body region, and a first conductive-type channel extension region formed over the substrate and which overlaps a portion of the gate electrode.