Semiconductor Channel Hole Fabrication via Mask Shrinking
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Solution Overview
Problem
Existing semiconductor device fabrication methods face difficulties in supplying deposition or etching gases into deep holes with narrow openings, which can be mitigated by enlarging the hole size, but this approach reduces integration level.
Innovation Solution
A method involving forming a mold stack on a substrate, creating a mask layer, etching to form a channel hole, shrinking the mask layer, and forming a vertical channel with an enlarged upper entrance to facilitate gas supply, allowing effective deposition and etching processes while maintaining device integration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If the hole size is enlarged to facilitate gas supply, then the ease of operation improves, but the integration level deteriorates
Solution Approach 1:
The patent applies dimensionality change by transforming the cylindrical hole into a conical structure with an enlarged upper opening. This dimensional modification allows gas to be supplied effectively from the top opening while maintaining the deep vertical channel, thus resolving the contradiction between ease of gas supply and maintaining integration level.
Solution Approach 2:
The patent uses a mask layer as a preliminary structure that is formed before the etching process. This mask layer serves as a template that defines the conical shape of the hole, enabling the upper opening to be enlarged in advance while the deep channel is subsequently formed through etching.
2Ease of operation
If the mask layer is shrunk to enlarge the hole opening, then the ease of operation improves, but the manufacturing precision deteriorates
Solution Approach 1:
The patent introduces a spacer layer as an intermediary structure between the shrunk mask layer and the final hole structure. This spacer layer compensates for the dimensional changes caused by mask shrinking and ensures precise control over the final hole dimensions, thus maintaining manufacturing precision while enabling gas supply.
Solution Approach 2:
The patent changes the physical and chemical parameters of the mask layer during the shrinking process, including material composition and structural properties. These parameter changes allow the mask layer to be shrunk controllably while maintaining the precision of the final hole structure through subsequent processing steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables effective supply of gases into the channel hole, improving the reliability and yield of semiconductor device fabrication with enhanced structural integrity and reduced fabrication costs.
Implementation Method 1
etching the mold layer using the mask layer as an etch mask to form a channel hole penetrating the mold layer
Implementation Method 2
Deposition and etching processes are used to fabricate a semiconductor device
Implementation Method 3
The shrinking of the mask layer may include removing the upper mask layer, and etching a side surface of the lower mask layer
Data Source
AI summary
Provided are methods of fabricating a semiconductor device. The method may include forming a mold layer on a substrate, forming a mask layer on the mold layer, etching the mold layer using the mask layer as an etch mask to form a channel hole penetrating the mold layer, shrinking the mask layer to provide a reduced mask layer, forming a spacer layer to cover the reduced mask layer, and forming a vertical channel to fill the channel hole and be electrically connected to the substrate. As a result, the channel hole can have an enlarged entrance.