Semiconductor Channel Region Fabrication via Epitaxial Growth
Solution Overview
Problem
Integration issues arise when high-temperature processes are performed in the transition from polysilicon gate electrodes to metal gate electrodes in CMOS devices, particularly due to challenges in replacing gate oxide with high-k gate dielectrics, which affect device performance as feature sizes decrease.
Innovation Solution
A method for fabricating semiconductor integrated circuits that involves receiving a semiconductor device precursor with a substrate, dummy gate stacks, and source/drain regions, where dummy gate stacks are removed to form a gate trench, and a channel region is formed epitaxially before depositing a high-k dielectric and metal gate, avoiding dopant-related thermal processes and allowing for a locally selective epitaxial growth and embedded back-diffusion barrier layer formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high-temperature thermal processes are performed to replace polysilicon gate electrode with metal gate electrode, then device performance can be improved, but integration issues and process complexity increase
Solution Approach 1:
The channel region is formed epitaxially before the metal gate electrode deposition, and dopant activation is performed before high-k dielectric deposition. This preliminary action sequence allows subsequent high-temperature processes to proceed without dopant-related thermal issues, resolving the contradiction between achieving device performance improvement and avoiding process complexity
2Productivity
If feature sizes are decreased, then functional density increases, but device performance deteriorates due to gate oxide and polysilicon gate limitations
Solution Approach 1:
The invention changes the material parameters from traditional gate oxide and polysilicon gate to high-k gate dielectric and metal gate electrode. This parameter change enables continued device performance improvement at smaller feature sizes, resolving the contradiction between increasing functional density and maintaining device performance
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces random dopant fluctuation, enhances channel mobility, and provides process flexibility, improving device performance by avoiding high-temperature thermal processes after channel region formation and enabling the use of a high-k dielectric and metal gate without dopant activation issues.
Implementation Method 1
epitaxially growing a channel layer to fill in the channel trench to form a channel region
Data Source
AI summary
A method of fabricating a semiconductor integrated circuit (IC) is disclosed. The method includes receiving a semiconductor device precursor. The semiconductor device precursor includes a substrate, source/drain regions on the substrate, dummy gate stacks separating the source/drain regions on the substrate and a doped region under the dummy gate stacks. The dummy gate stack is removed to form a gate trench. The doped region in the gate trench is recessed to form a channel trench. A channel layer is deposited in the channel trench to form a channel region and then a high-k (HK) dielectric layer and a metal gate (MG) are deposited on the channel region.


