Semiconductor Channel Thickness Variation for On-Current and Capacitance
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Solution Overview
Problem
In semiconductor devices with oxide semiconductor channels, the distance between source/drain electrodes and the gate electrode increases, leading to decreased on-current and deteriorated swing characteristics, while reducing this distance increases parasitic capacitance and risks breaking the insulation layer under breakdown voltage.
Innovation Solution
A semiconductor device design where the channel thickness and source/drain electrode thickness vary in the vertical direction, with a gate electrode and source/drain electrodes arranged on a substrate, and contact plugs and wirings configured to maintain a consistent distance between the gate and source/drain electrodes, enhancing on-current and reducing parasitic capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the distance between source/drain electrodes and gate electrode is increased, then on-current decreases and swing characteristics deteriorate, but parasitic capacitance between source/drain electrodes and gate electrode decreases and insulation layer breakdown is prevented
Solution Approach 1:
The channel thickness is made non-uniform in the vertical direction, being thinner at regions closer to the gate electrode and thicker at regions farther away. This local variation in channel thickness allows optimization of electrical characteristics at different locations, improving on-current while maintaining adequate spacing to reduce parasitic capacitance and prevent insulation breakdown.
Solution Approach 2:
The invention transitions from a two-dimensional planar channel structure to a three-dimensional structure with vertical thickness variation. By controlling the channel thickness in the vertical dimension, the patent achieves better electrical performance without increasing the horizontal distance between electrodes, thus resolving the contradiction between on-current and parasitic capacitance.
2Productivity
If the distance between source/drain electrodes and gate electrode is decreased, then parasitic capacitance increases and insulation layer may break down, but on-current and swing characteristics improve
Solution Approach 1:
The channel thickness varies locally in the vertical direction, being thinner near the gate electrode to reduce parasitic capacitance and thicker farther away to maintain good on-current characteristics. This local optimization allows the device to achieve both low parasitic capacitance and high on-current without compromising insulation layer integrity.
Data Source
AI summary
A semiconductor device includes a gate electrode on a substrate, a channel surrounding sidewalls of the gate electrode on the substrate, and source/drain electrodes on the substrate at opposite sides of the gate electrode in a first direction parallel to an upper surface of the substrate. A thickness of the channel from the gate electrode to the source/drain electrodes in a horizontal direction parallel to the upper surface of the substrate is not constant but varies in a vertical direction perpendicular to the upper surface of the substrate.