Semiconductor Channel Growth Using TMD Seed Patterns

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Solution Overview

Problem

As semiconductor devices are scaled down, their operating characteristics deteriorate due to increased integration, leading to performance limitations.

Innovation Solution

A semiconductor device design that includes a substrate with a first and second device region, a dummy region between them, and insulating patterns with a seed pattern and seed mask pattern, where the seed pattern includes a transition metal dichalcogenide, enhancing channel pattern growth and electrical characteristics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If MOSFETs are scaled down to increase integration, then device density increases, but operating characteristics deteriorate

Engineering Contradiction:
Improvedevice integration densityVSAvoidoperating characteristics
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent introduces a dummy region between device regions that extends in the third dimension (vertical direction) with insulating patterns and seed patterns. This vertical stacking approach allows maintaining horizontal integration density while providing thermal management and electrical isolation functions in the vertical dimension, thereby preventing operating characteristic deterioration.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The dummy region acts as an intermediary structure between adjacent device regions. It contains insulating patterns for electrical isolation and seed patterns for controlled material growth, mediating the interaction between neighboring devices to prevent performance degradation while maintaining high integration.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of manufacture

If channel patterns are grown without controlled seed patterns, then manufacturing process is simpler, but growth uniformity and directionality are poor

Engineering Contradiction:
Improvechannel pattern formation processVSAvoidchannel pattern growth uniformity
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent forms seed patterns in the dummy region before channel pattern formation. These pre-formed seed patterns provide controlled nucleation sites that guide the subsequent channel material growth, ensuring uniform thickness and directional growth while maintaining a relatively simple overall process flow.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The seed patterns are selectively formed only in the dummy region between device regions, not throughout the entire substrate. This localized approach provides precise control over channel growth in specific areas where needed, while keeping the manufacturing process targeted and efficient.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed design improves the reliability and performance of semiconductor devices by ensuring uniform and single-directional growth of channel patterns, thereby enhancing electrical characteristics.

Implementation Method 1

the seed pattern includes a transition metal dichalcogenide... ensuring uniform and single-directional growth of channel patterns

Methodology Applied
Scientific EffectEpitaxy: Epitaxy

Data Source

PatentUS20250040245A1Semiconductor device and a method of manufacturing the same
Publication Date: 2025.01.30 SAMSUNG ELECTRONICS CO LTD
  • US20250040245A1 patent drawing
  • US20250040245A1 patent drawing
  • US20250040245A1 patent drawing

AI summary

A semiconductor device includes a substrate, a first device region on the substrate, a second device region on the substrate and spaced apart from the first device region in a first direction, a first dummy region between the first device region and the second device region, and an insulating pattern in the first device region, the second device region and the first dummy region, where the first dummy region includes a seed pattern on the insulating pattern, and a seed mask pattern at least partially covering a top surface of the seed pattern and extending from the top surface of the seed pattern along a first sidewall of the seed pattern, where the insulating pattern in the first dummy region is on the substrate, and where the seed pattern includes a transition metal dichalcogenide.