Semiconductor Device With Width-Varying Channel Segments
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional three-dimensional non-volatile memory devices face challenges in maintaining uniformity of the channel layer due to limitations in the etching process, leading to non-uniform characteristics of stacked memory cells as the structure height increases.
Innovation Solution
The semiconductor device employs first and second semiconductor patterns with specific width variations, where the second patterns increase in width away from the joining surface, and openings with uniform or varying widths to form a stacked structure with conductive and insulating layers, ensuring uniform resistance and improved threshold voltage distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the stacked structure height is increased to improve integration density, then the degree of integration is improved, but the channel layer uniformity deteriorates due to etching process limitations
Solution Approach 1:
The channel layer is divided into multiple segments corresponding to different height regions (first channel layer segment in lower part, second channel layer segment in upper part). Each segment can have different widths to compensate for etching effects, with the lower segment being wider to compensate for top-to-bottom width decrease during etching.
Solution Approach 2:
Different regions of the channel layer are given different local properties (widths). The channel layer has a wider width in the lower part and a narrower width in the upper part, creating non-uniform local characteristics that collectively achieve uniform overall performance across the stacked structure.
2Ease of manufacture
If conventional etching process is used to form channel layers in stacked structures, then the manufacturing process is simple, but the channel layer width decreases from top to bottom resulting in non-uniform memory cell characteristics
Solution Approach 1:
The channel layer width variation is pre-designed and formed during the layer deposition process itself, rather than attempting to correct etching effects afterward. The first and second channel layer segments are formed with different widths from the beginning, so that after etching, the final channel layers achieve uniform characteristics.
3Manufacturing precision
If the channel layer width is maintained uniform from top to bottom, then the memory cell characteristics become uniform, but the etching process cannot accommodate the width variation needed for compensation
Solution Approach 1:
The solution moves from trying to maintain uniform width in the vertical dimension to creating controlled width variation in the horizontal dimension. By varying the channel layer width horizontally at different vertical levels (creating segments), the patent achieves uniform electrical characteristics despite the structural variation.
Data Source
AI summary
A semiconductor device includes first semiconductor patterns with protrusions formed on the sidewalls thereof, and second semiconductor patterns respectively coupled to the first semiconductor patterns and increasing in width away from joining surfaces where the first semiconductor patterns and the second semiconductor patterns are coupled.