Semiconductor Charge Compensation Drift Region Segmentation
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Solution Overview
Problem
Semiconductor devices with charge compensation structures face significant switching losses and delays due to high stored charge in the space charge region, which affects their efficiency in switching operations.
Innovation Solution
The semiconductor device incorporates a drift region of a first conductivity type, compensation regions of a second conductivity type forming pn-junctions, and a third semiconductor layer with a floating field plate or self-charging charge trap, which reduces switching losses by managing the electric field and charge distribution during blocking and switching modes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If charge compensation structures are implemented to reduce on-state resistance, then forward current losses are reduced, but switching delays increase due to high stored charge in the space charge region
Solution Approach 1:
The drift region is segmented into multiple regions with different doping concentrations: a first drift region with lower doping concentration and a second drift region with higher doping concentration. This segmentation allows the first region to provide high breakdown voltage with low stored charge (reducing switching delays) while the second region provides low on-state resistance (reducing forward current losses), thus resolving the contradiction between reducing switching delays and maintaining low forward current losses.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces switching losses and delays by effectively managing the electric field and charge distribution, maintaining low on-state resistance and improving the trade-off between forward current losses and switching losses compared to conventional compensation MOSFETs.
Implementation Method 1
at least two compensation regions of a second conductivity type each of which forms a pn-junction with the drift region
Implementation Method 2
a third semiconductor layer of the first conductivity type arranged between the drift region and the drain region and including at least one of a floating field plate or a floating semiconductor region of the second conductivity type forming a pn-junction with the third semiconductor layer
Data Source
AI summary
A semiconductor device includes a semiconductor body and a source metallization arranged on a first surface of the body. The body includes: a first semiconductor layer including a compensation-structure; a second semiconductor layer adjoining the first layer, comprised of semiconductor material of a first conductivity type and having a doping charge per horizontal area lower than a breakdown charge per area of the semiconductor material; a third semiconductor layer of the first conductivity type adjoining the second layer and comprising at least one of a self-charging charge trap, a floating field plate and a semiconductor region of a second conductivity type forming a pn-junction with the third layer; and a fourth semiconductor layer of the first conductivity type adjoining the third layer and having a maximum doping concentration higher than that of the third layer. The first semiconductor layer is arranged between the first surface and the second semiconductor layer.