Semiconductor Device Charge Extracting Region Inhibits Parasitic Bipolar Transistor

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Solution Overview

Problem

High breakdown voltage ICs face challenges in inhibiting the operation of parasitic bipolar transistors, particularly in high-side driving circuits, due to noise-induced voltage surges, which can lead to malfunction and heat generation from large currents.

Innovation Solution

The semiconductor device incorporates a first well region of one conduction type and a second well region of a different conduction type, along with a charge extracting region of the first conduction type, to inhibit the operation of parasitic bipolar transistors by applying voltages in a manner that biases a p-i-n diode forward, allowing current extraction and reducing parasitic transistor operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If a high breakdown voltage IC is used for power conversion, then power conversion capability is improved, but parasitic bipolar transistor operation occurs due to noise-induced voltage surges

Engineering Contradiction:
Improvepower conversion capabilityVSAvoidparasitic transistor operation
Core Design Contradiction:
PowerVSReliability

Solution Approach 1:

A charge extracting region is introduced as an intermediary element between the n-well region and the p-type semiconductor substrate. This region acts as a mediator to extract accumulated charges that would otherwise trigger parasitic bipolar transistor operation, thereby resolving the contradiction between maintaining high breakdown voltage for power conversion and preventing parasitic transistor activation from noise-induced voltage surges

Inventive Principle:
Principle #24Intermediary (Mediator)

2Power

If the longitudinal area of the high-side region is increased to handle higher currents, then power conversion efficiency is improved, but parasitic element operation becomes more likely due to larger area

Engineering Contradiction:
Improvecurrent handling capabilityVSAvoidparasitic element operation
Core Design Contradiction:
PowerVSObject-affected harmful factors

Solution Approach 1:

The charge extracting region is locally positioned within the high-side region's longitudinal area, specifically in the n-well region. This local modification allows the high-side region to maintain its large longitudinal area for high current handling capability, while the locally introduced charge extracting region selectively addresses the harmful parasitic element operation by extracting accumulated charges in that specific location

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively reduces the current flowing into parasitic pnp bipolar transistors, preventing malfunctions and enhancing the reliability of the semiconductor device by maintaining a breakdown voltage and inhibiting parasitic transistor operation.

Implementation Method 1

applying voltages in a manner that biases a p-i-n diode forward, allowing current extraction and reducing parasitic transistor operation

Methodology Applied
Scientific Effectp-i-n diode forward bias: Diode

Data Source

PatentUS9608072B2Semiconductor device
Publication Date: 2017.03.28 FUJI ELECTRIC CO LTD
  • US9608072B2 patent drawing
  • US9608072B2 patent drawing
  • US9608072B2 patent drawing

AI summary

A semiconductor device is provided with a first well region of a first conduction type having a first voltage (voltage VB) applied thereto, a second well region of a second conduction type formed in the surface layer section of the first well region and having a second voltage (voltage VS) different from the first voltage applied thereto, and a charge extracting region of the first conduction type formed in the surface layer section of the second well region and having the first voltage applied thereto. This inhibits the operation of a parasitic bipolar transistor.