Semiconductor Charge Storage Device High-k Dielectric
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Solution Overview
Problem
Conventional DRAM devices require frequent refreshing due to charge loss in MOS capacitors and face limitations in miniaturization due to the size of the storage capacitor, which restricts their performance in modern electronic systems.
Innovation Solution
A semiconductor charge storage device with a charge trapping material having a higher dielectric constant than silicon oxide, where a dielectric material is formed by thermal oxidation of the charge trapping material, enhancing the charge trapping capability and allowing for efficient charge storage and programming.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional MOS capacitor is used for charge storage, then the device can store charges, but the capacitor loses charges frequently requiring frequent refreshing operations
Solution Approach 1:
The patent changes the material parameter of the dielectric layer from conventional silicon oxide to a dielectric material with higher dielectric constant (such as silicon nitride, hafnium oxide, or aluminum oxide). This parameter change increases the charge trapping capability and reduces charge loss, thereby improving charge retention and reducing the need for frequent refresh operations.
Solution Approach 2:
The patent employs a composite structure consisting of a semiconductor substrate, a dielectric material layer with high dielectric constant, and a conductive material layer. This composite material approach combines the advantages of different materials to achieve both high charge storage capacity and low charge loss, resolving the contradiction between charge retention and refresh frequency.
2Reliability
If the storage capacitor size is increased to hold minimum charges, then charge storage capability is improved, but device miniaturization is restricted
Solution Approach 1:
The patent changes the dielectric constant parameter of the storage capacitor's dielectric material from the conventional value (silicon oxide, k≈3.9) to a higher value (silicon nitride k≈7.5, hafnium oxide k≈25, or aluminum oxide k≈10). This parameter change increases the charge storage capability per unit volume, allowing the capacitor to hold the minimum required charges in a smaller volume, thus enabling device miniaturization.
3Productivity
If conventional programming voltages are used, then the device can be programmed, but programming efficiency is low and higher voltages are required
Solution Approach 1:
The patent changes the dielectric material parameter to one with higher dielectric constant and better charge trapping characteristics. This parameter change enhances the electric field distribution and charge trapping efficiency, allowing for more efficient programming operations at lower voltages, thereby improving productivity and reducing energy consumption.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution increases charge trapping capability, reducing the need for frequent refresh operations and enabling more efficient programming with lower voltages, thus improving the performance and retention of DRAM devices.
Implementation Method 1
the dielectric material is formed by conversion of a portion of the charge trapping material. In an embodiment, the dielectric material is formed using a thermal oxidation process for providing a higher charge trapping capability.
Implementation Method 2
The charge trapping material is characterized by a first dielectric constant and by a first charge trapping capability. In a specific embodiment, the first dielectric constant is higher than a dielectric constant associated with silicon oxide.
Implementation Method 3
The layer of silicon oxide has a thickness selected to allow charge tunneling. For example, in a specific embodiment, the layer of silicon oxide may have a thickness of 15 Å or less.
Data Source
AI summary
A semiconductor charge storage device includes a semiconductor substrate having a surface region. The semiconductor substrate is characterized by a first conductivity type. A charge trapping material overlies and is in contact with at least a portion of the surface region of the semiconductor substrate. The charge trapping material is characterized by a first dielectric constant and by a first charge trapping capability. The first dielectric constant is higher than a dielectric constant associated with silicon oxide. A dielectric material overlies and is in contact with at least a portion of the charge trapping material. The dielectric material is formed using a conversion of a portion of the charge trapping material for providing a second charge trapping capability. The device also includes a conductive material overlying the second dielectric. The conductive material is capable of receiving an electrical signal to cause electrical charges being trapped in the semiconductor charge storage device.