Semiconductor Device Charge Storage Layer Architecture

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current non-volatile semiconductor devices for data storage face challenges in extending the retention time of data stored in the floating gate, which affects device reliability and efficiency.

Innovation Solution

A semiconductor device is designed with a charge storage layer positioned under the channel layer, not overlapping the source and drain regions, utilizing an oxide semiconductor layer and an oxide-nitride-oxide stacking structure or a floating gate, to store induced charges and simplify the device structure while reducing threshold voltage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a charge storage layer is positioned under the channel layer and does not overlap the source and drain regions, then data storage reliability is improved, but device structure becomes more complex

Engineering Contradiction:
Improvedata storage reliabilityVSAvoiddevice structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The charge storage layer is merged with the channel layer to form an integrated stacking structure. This combination allows the charge storage function to be embedded within the channel formation process, improving data storage reliability while avoiding the need for separate, overlapping source/drain region structures.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The charge storage layer is positioned in a different spatial dimension (under the channel layer) rather than overlapping the source and drain regions in the same plane. This vertical stacking approach resolves the contradiction by achieving reliable charge storage without increasing lateral device complexity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Quantity of substance

If an oxide-nitride-oxide stacking structure is used for charge storage, then charge storage capability is improved, but manufacturing process becomes more difficult

Engineering Contradiction:
Improvecharge storage capabilityVSAvoidmanufacturing process
Core Design Contradiction:
Quantity of substanceVSEase of manufacture

Solution Approach 1:

The charge storage structure is segmented into multiple functional layers (oxide layer, nitride layer, oxide layer) stacked vertically. This segmentation allows each layer to be formed using standard deposition processes, improving charge storage capability while maintaining compatibility with existing manufacturing techniques.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The oxide-nitride-oxide stacking structure uses composite materials with complementary properties. The oxide layers provide charge storage and the nitride layer provides charge trapping, creating a synergistic structure that enhances charge storage capability while using materials compatible with standard semiconductor fabrication processes.

Inventive Principle:
Principle #40Composite materials

3Reliability

If the charge storage layer does not overlap the source and drain regions, then threshold voltage is reduced, but device area increases

Engineering Contradiction:
Improvedevice reliabilityVSAvoiddevice area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The charge storage layer is moved to a vertical position under the channel layer, utilizing the third dimension (depth) rather than expanding in the lateral plane. This dimensional transition reduces threshold voltage while minimizing the increase in device area.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The charge storage layer is nested within the channel structure, positioned underneath the channel layer. This nesting arrangement allows the charge storage function to be embedded within the existing device footprint, reducing threshold voltage without significantly increasing overall device area.

Inventive Principle:
Principle #7Nested doll (Nesting)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances data storage reliability and efficiency by allowing for better charge storage without the need for an additional bottom gate, resulting in a more reliable and simplified semiconductor device architecture.

Implementation Method 1

The charge storage layer may include an oxide-nitride-oxide stacking structure or a floating gate. The semiconductor device according to the present invention may store induced charges in the charge storage layer, thereby achieving the function of data memory.

Methodology Applied
Scientific EffectElectrostatic accumulation: Electrostatics

Implementation Method 2

The tunneling effect and source side injection effect may trap the electrons in the floating gate to achieve the function of data storage.

Methodology Applied
Scientific EffectTunneling effect:

Implementation Method 3

The tunneling effect and source side injection effect may trap the electrons in the floating gate to achieve the function of data storage.

Methodology Applied
Scientific EffectSource side injection effect:

Data Source

PatentUS9806085B1Semiconductor device and method of forming the same
Publication Date: 2017.10.31 UNITED MICROELECTRONICS CORP
  • US9806085B1 patent drawing
  • US9806085B1 patent drawing
  • US9806085B1 patent drawing

AI summary

The present invention provides a semiconductor device and a method of forming the same, and the semiconductor device includes a first insulating layer, a source and a drain, a stacked structure, a second insulating layer, and a gate. The first insulating layer is disposed on a substrate. The source and the drain are disposed on the first insulating layer, and the stacked structure is also disposed on the first insulating layer, between the source and the drain. The stacked structure includes a charge storage layer and an oxide semiconductor (OS) layer disposed on the charge storage layer. The second insulating layer covers the source, the drain and the OS layer. The gate is disposed on the second insulating layer.