Semiconductor Charge Storage Pattern with Vertical Protrusion
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Solution Overview
Problem
Current semiconductor devices face challenges in achieving high data storage capacity and efficient electrical characteristics due to limitations in the design of charge storage and blocking patterns, which affect the retention and movement of electrical charges.
Innovation Solution
The semiconductor device incorporates a channel structure with a vertical tunneling layer, a charge storage pattern comprising multiple charge storage material layers spaced apart, and a blocking pattern with protrusions extending beyond the charge storage pattern, optimized through specific etching processes to enhance electrical charge retention and prevent charge leakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a single charge storage layer is used, then the device structure is simple, but the data storage capacity is limited
Solution Approach 1:
The charge storage layer is divided into multiple distinct charge storage material layers (first charge storage material layer and second charge storage material layer) spaced apart vertically. Each layer can independently store electrical charges, enabling multi-level data storage and increasing the overall data storage capacity of the device while maintaining a manageable structural complexity through systematic arrangement.
2Reliability
If the blocking pattern is flush with the charge storage pattern, then the manufacturing process is simpler, but charge leakage occurs
Solution Approach 1:
The blocking pattern extends in the vertical dimension beyond the outer side surface of the charge storage pattern, creating a protrusion that vertically overlaps with the charge storage material layers. This vertical extension provides enhanced electrical isolation and prevents charge leakage without significantly complicating the manufacturing process, as it can be achieved through standard deposition and etching techniques.
3Reliability
If the first charge storage material layer is closer to the first gate layer, then the electrical control is improved, but charge interference between layers increases
Solution Approach 1:
A blocking material layer is positioned between the first charge storage material layer and the first gate layer, serving as an intermediary that provides electrical isolation. This blocking layer prevents direct charge interference between the charge storage layer and gate layer while still allowing the gate to exert electrical control over the channel, thus resolving the conflict between electrical control and charge interference.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves the electrical characteristics and data storage capacity by ensuring effective charge retention and preventing electrical charge loss, leading to enhanced performance in semiconductor devices.
Implementation Method 1
a vertical tunneling layer surrounding the channel layer
Implementation Method 2
a blocking pattern on an outer side surface of the charge storage pattern... the blocking pattern is in contact with the outer side surface of the charge storage pattern and includes a vertical protrusion part extending longer than the outer side surface of the charge storage pattern
Data Source
AI summary
A semiconductor device includes a substrate; a stack structure including a first gate layer, a first interlayer insulating layer, and a second gate layer; and a channel structure penetrating through the stack structure and in contact with the substrate, the channel structure including a channel layer, a vertical tunneling layer surrounding the channel layer, a charge storage pattern on an outer surface of the vertical tunneling layer, and a blocking pattern on an outer surface of the charge storage pattern, the charge storage pattern includes first and second charge storage material layers vertically spaced apart and adjacent to the gate layers, the blocking pattern includes vertically spaced blocking material layers between the charge storage material layers and the gate layers, and the blocking pattern contacts the outer surface of the charge storage pattern and includes a vertical protrusion extending longer than the outer surface of the charge storage pattern.