Semiconductor Device Charge Trap Layer Threshold Voltage Adjustment

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Solution Overview

Problem

Miniaturization of transistors leads to deterioration of electrical characteristics such as on-state current, off-state current, threshold voltage, and subthreshold swing, necessitating a solution to maintain performance and reliability.

Innovation Solution

A semiconductor device with a first and second transistor, each featuring an oxide semiconductor and a charge trap layer, where the first charge trap layer holds a larger number of electrons than the second, allowing for adjusted threshold voltage and improved electrical characteristics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If transistor miniaturization is pursued to increase integration degree, then device integration is improved, but electrical characteristics such as on-state current, off-state current, threshold voltage, and subthreshold swing deteriorate

Engineering Contradiction:
Improveintegration degreeVSAvoidelectrical characteristics
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies local quality by introducing charge trap layers with different electron holding capacities at different locations. The first charge trap layer has a greater number of electrons than the second charge trap layer, creating localized electrical characteristics that compensate for miniaturization effects in specific regions of the transistor structure

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes physical parameters by controlling the number of electrons in charge trap layers. By adjusting the electron concentration in the first and second charge trap layers differently, the threshold voltage and other electrical characteristics are tuned to maintain performance despite transistor miniaturization

Inventive Principle:
Principle #35Parameter changes

2Reliability

If threshold voltage is adjusted using charge trap layers, then electrical characteristics are improved, but device structure becomes more complex

Engineering Contradiction:
Improveelectrical characteristicsVSAvoidstructure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements nesting by placing charge trap layers within the existing transistor structure. The first and second charge trap layers are embedded between the oxide semiconductor layer and the gate electrode, integrating the threshold voltage adjustment function into the conventional transistor architecture without requiring separate external components

Inventive Principle:
Principle #7Nested doll (Nesting)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively suppresses the deterioration of electrical characteristics, enhances on-state current, and maintains low power consumption, ensuring high reliability and data retention even when power is stopped.

Implementation Method 1

a first charge trap layer between the first oxide semiconductor and the first gate electrode... The number of electrons held in the first charge trap layer is larger than the number of electrons held in the second charge trap layer

Methodology Applied
Scientific EffectElectron trapping: Electrostatics

Data Source

PatentUS9537014B2Semiconductor device, method for manufacturing semiconductor device, and electronic device
Publication Date: 2017.01.03 SEMICON ENERGY LAB CO LTD
  • US9537014B2 patent drawing
  • US9537014B2 patent drawing
  • US9537014B2 patent drawing

AI summary

Threshold voltage adjustment method of a semiconductor device is provided. In a semiconductor device in which at least one of transistors included in an inverter includes a semiconductor, a source electrode or a drain electrode electrically connected to the semiconductor, a gate electrode, and a charge trap layer provided between the gate electrode and the semiconductor, the potential of the gate electrode of the transistor that is higher than those of the source electrode and the drain electrode is held for a short time of 5 s or shorter, whereby electrons are trapped in the charge trap layer and the threshold voltage is increased. At this time, when the potential differences between the gate electrode and the source electrode, and the gate electrode and the drain electrode are different from each other, the threshold voltage of the transistor of the semiconductor device becomes appropriate.