Semiconductor Chip Detachment via Adhesive Holding Elements
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Solution Overview
Problem
Current methods for manufacturing semiconductor chips do not efficiently enable the parallel assembly and easy detachment of multiple semiconductor chips while maintaining their original configuration and interconnectivity.
Innovation Solution
A method involving a semiconductor substrate with integrated electronic circuits, a sacrificial layer with holes, and an adhesive layer to form holding elements, followed by thinning and introducing separation trenches to separate the chips, allowing for easy detachment and maintaining original configuration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple semiconductor chips are assembled in parallel on a substrate, then manufacturing efficiency is improved, but the complexity of detaching and separating the chips increases
Solution Approach 1:
The patent introduces separation trenches that physically divide the substrate into individual chip regions. These trenches create clear boundaries between adjacent chips, enabling easy mechanical separation and detachment of individual chips from the substrate without complex procedures.
Solution Approach 2:
The patent removes sacrificial oxide layers from specific regions between chips. This extraction of the sacrificial material creates release interfaces that allow chips to be easily detached from the substrate by simply peeling them away, significantly simplifying the detachment process.
2Ease of operation
If chips are detached from the substrate, then individual chip assembly is enabled, but the original configuration and interconnectivity may be compromised
Solution Approach 1:
The patent performs preliminary actions by forming separation trenches and removing sacrificial oxide layers before chip detachment. These preliminary modifications to the substrate structure ensure that when chips are detached, they maintain their original relative positions and configurations, as the separation paths have already been prepared.
Solution Approach 2:
The patent uses sacrificial oxide layers as intermediary materials between chips and the substrate. These layers act as temporary bonding agents that can be selectively removed, allowing chips to be detached while maintaining their original configuration. The sacrificial layers provide a controlled release mechanism that preserves chip integrity.
3Ease of manufacture
If a contiguous wiring layer is used between electronic circuits, then electrical insulation is simplified, but the ability to separate chips independently is reduced
Solution Approach 1:
The patent introduces separation trenches that divide the contiguous wiring layer into separate segments corresponding to individual chips. This segmentation allows the wiring layer to maintain its simple contiguous structure during fabrication, while enabling independent chip separation later, as the trenches create natural break points in the wiring.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables the parallel assembly and easy detachment of semiconductor chips while ensuring they remain connected in their original configuration, facilitating efficient manufacturing and mounting processes.
Implementation Method 1
an adhesive layer is used between the sacrificial layer and the carrier and wherein the adhesive layer fills the holes so that holding elements are formed from the adhesive layer in the holes
Data Source
AI summary
The method of manufacturing a plurality of semiconductor chips (100) comprises a step A) of providing a semiconductor substrate (1) having a plurality of integrated electronic circuits (2) on a top side (10) thereof. In a step B), a sacrificial layer (3) is applied on one side of the semiconductor substrate. In a step C), holes (30) are introduced in the sacrificial layer so that at least one hole is formed above each electronic circuit. In a step D), the semiconductor substrate is adhered to a carrier (5) with the sacrificial layer at the front, an adhesive layer (4) being used between the sacrificial layer and the carrier, and the adhesive layer filling the holes so that holding elements (40) from the adhesive layer are formed in the holes. In a step E) the semiconductor substrate is thinned. In a step F) separation trenches (6) are introduced between the electronic circuits, which extend from a side of the electronic circuits facing away from the carrier to the sacrificial layer and penetrate the thinned semiconductor substrate. In a step G) the sacrificial layer is removed in the region between the electronic circuits and the carrier.