Semiconductor Chip Mounting via Adhesive Film Pressure

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Solution Overview

Problem

The existing methods for semiconductor device manufacturing, particularly those using the DBG process and flip chip bonding, face challenges in preventing voids during the mounting process, which affects the reliability and quality of the semiconductor device due to thermal expansion differences and the complexity of filling underfill materials between the semiconductor chip and the chip mounting substrate.

Innovation Solution

A manufacturing method involving laminating a surface protective sheet with an adhesive film on the wafer, grinding to reduce thickness, picking up individual chips, die-bonding them to a substrate, and applying static pressure to remove voids formed during the adhesive film's use as an underfill material.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If sheet-like underfill material is used between chip and substrate, then thermal stress dispersion is achieved, but voids are formed due to material breaking and air bubble entrapment

Engineering Contradiction:
Improvejoint reliabilityVSAvoidvoid formation
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The invention changes the physical state of the underfill material from solid sheet to liquid resin, and changes the application method from manual placement to automated dispensing. This parameter change eliminates void formation while maintaining thermal stress dispersion benefits

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The invention replaces the mechanical placement of sheet-like underfill material with automated liquid dispensing system. This substitution eliminates manual handling issues such as material breaking and air bubble entrapment, achieving void-free application

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Manufacturing precision

If liquid underfill material is injected into gap between chip and substrate, then voids are prevented, but filling time increases and viscosity control becomes complicated

Engineering Contradiction:
Improvevoid-free fillingVSAvoidmounting speed
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The invention performs preliminary actions by optimizing the dispensing process parameters (nozzle design, dispensing speed, resin viscosity) before actual mounting. This preparation enables fast void-free filling without compromising quality

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The invention changes the resin viscosity parameter to an optimal range that balances flowability for void-free filling with setting speed for productivity. The automated dispensing system also controls dispensing pressure and speed parameters to achieve fast filling

Inventive Principle:
Principle #35Parameter changes

3Length of moving object

If DBG process is used to reduce chip thickness, then chip thickness is reduced, but voids are formed during subsequent mounting process

Engineering Contradiction:
Improvechip thicknessVSAvoidvoid formation
Core Design Contradiction:
Length of moving objectVSManufacturing precision

Solution Approach 1:

The invention replaces manual sheet placement with automated liquid dispensing system that can precisely control resin application on thin chips. This substitution eliminates the mechanical handling that causes voids while accommodating the reduced chip thickness from DBG process

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method ensures high reliability of semiconductor devices by effectively removing voids in the adhesive film, simplifying the manufacturing process, and improving product quality by ensuring continuous and efficient mounting with the DBG and flip chip bonding processes.

Implementation Method 1

curing the heat curable liquid resin to bond the whole face of the bump joint portion to the chip mounting substrate

Methodology Applied
Scientific EffectCuring:

Implementation Method 2

applying a static pressure larger than the ambient pressure by 0.05 MPa or more to a stacked body including the adhesive film

Methodology Applied
Scientific EffectCompression: Compression

Implementation Method 3

reducing the thickness of the wafer and finally dividing the wafer into individual chips by grinding a back face of the wafer

Methodology Applied
Scientific EffectGrinding: Abrasion

Implementation Method 4

when exposed to a periodical temperature fluctuation, there is a possibility that the joint may brake due to the difference of a thermal expansion coefficient between the semiconductor chip and the chip mounting substrate

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Data Source

PatentUS8003441B2Manufacturing method of semiconductor device
Publication Date: 2011.08.23 LINTEC CORP
  • US8003441B2 patent drawing
  • US8003441B2 patent drawing
  • US8003441B2 patent drawing

AI summary

A manufacturing method of a semiconductor device according to the present invention comprises:laminating a surface protective sheet to a circuit surface side of a wafer formed with grooves which divide each circuit wherein an adhesive film is adhered on the circuit surface of the wafer;reducing the thickness of the wafer and finally dividing the wafer into individual chips by grinding a back face of the wafer;picking up individual chips together with the adhesive film;die-bonding said individual chip to predetermined position of a chip mounting substrate via said adhesive film;fixing the chip to the chip mounting substrate by heating the die-bonded chip having the adhesive film; andapplying a static pressure larger than an ambient pressure by 0.05 MPa or more to a stacked body including the adhesive film one or more times, at any point between adhering the wafer to the adhesive film and fixing the chip to the chip mounting substrate.