Semiconductor Chip Alignment via Optical Feedback Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Semiconductor devices with stacked chips often experience misalignment during manufacturing, leading to potential connection failures due to inaccuracies in alignment mark recognition and alignment processes.
Innovation Solution
A semiconductor manufacturing apparatus that uses cameras to capture images of alignment marks on multiple chips, calculates center coordinates, and determines misalignment amounts to ensure proper alignment and prevent stacking when misalignment exceeds a standard range, thereby reducing the risk of connection failures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Extent of automation
If alignment marks are checked by camera and chips are aligned based on captured images, then alignment process is automated, but misalignment still occurs between stacked chips
Solution Approach 1:
The patent implements feedback by capturing images of alignment marks after stacking, calculating misalignment amounts, and using this information to determine whether to stack additional chips. The system continuously monitors alignment quality and adjusts the stacking process based on measured misalignment, transforming a open-loop automated process into a closed-loop controlled process that maintains precision despite automation.
Solution Approach 2:
The patent replaces mechanical alignment methods with optical measurement systems. Instead of relying on mechanical positioning accuracy, the system uses cameras to capture images of alignment marks, calculates center coordinates, and determines misalignment amounts through image processing and coordinate calculation, substituting mechanical precision requirements with optical measurement and computational analysis.
2Productivity
If misalignment is not detected and stacking continues, then productivity is maintained, but connection failures occur and waste increases
Solution Approach 1:
The system uses feedback from misalignment amount calculations to control the stacking process. After each stacking operation, the camera captures images, the misalignment amount is calculated, and this feedback determines whether the next chip should be stacked. This closed-loop control maintains reliability by preventing stacking when misalignment exceeds acceptable thresholds while maintaining productivity by automatically continuing when alignment is satisfactory.
Solution Approach 2:
The patent performs preliminary alignment verification before proceeding with stacking. By capturing images of alignment marks and calculating misalignment amounts in advance, the system determines whether stacking conditions are met before actually performing the stacking operation, preventing connection failures before they occur rather than detecting them after the fact.
3Measurement precision
If alignment verification is performed after stacking, then misalignment can be detected, but additional process time is required
Solution Approach 1:
The patent merges the alignment verification process with the stacking process itself. The camera captures images of alignment marks both before and after stacking in an integrated sequence, and the misalignment calculation is performed as part of the control loop rather than as a separate verification step. This combining of measurement and processing operations reduces overall process time while maintaining measurement precision.
Data Source
AI summary
A method for manufacturing a semiconductor device includes determining a position of a first semiconductor chip having a plurality of first electrodes, using one or more first alignment marks formed on the first semiconductor chip, determining a position of a second semiconductor chip having a plurality of second electrodes, using one or more second alignment marks formed on the second semiconductor chip, moving the second semiconductor chip relative to the first semiconductor chip, based on the determined positions of the first and second semiconductor chips, such that the second electrodes are aligned with the first electrodes, after said moving, stacking the second semiconductor chip on the first semiconductor chip, such that the first electrodes are electrically connected to the second electrodes, and calculating a misalignment amount between the first semiconductor chip and the second semiconductor chip stacked thereon.