3D Stacked Semiconductor Chip Arrangement with Sensor and ASIC

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Solution Overview

Problem

Existing semiconductor sensor chip arrangements, including pressure and temperature sensors, are excessively large due to complex mounting and housing requirements, necessitating a miniaturized and thermomechanically stable configuration for various applications.

Innovation Solution

A semiconductor chip arrangement where an ASIC chip with an integrated circuit is mounted on a carrier using an adhesion layer, with a sensor chip electrically connected to the ASIC chip via interchip connections like solder balls, and embedded in a molding compound, allowing for mechanical decoupling and thermomechanical stability, along with a covering layer for protection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If sensor chips are mounted in traditional housings with die bonding and bonding wires, then reliable electrical connections are achieved, but the arrangement occupies excessively large volume

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidsensor arrangement volume
Core Design Contradiction:
ReliabilityVSVolume of moving object

Solution Approach 1:

The patent combines the sensor chip and ASIC chip into a single integrated arrangement mounted directly on a circuit board carrier, eliminating the need for separate traditional housings. The sensor chip is positioned in direct proximity to the ASIC chip with interchip connections formed between them, merging multiple components into a compact unified structure that significantly reduces overall volume while maintaining electrical connection reliability.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent transitions from planar mounting to three-dimensional stacking by positioning the sensor chip above the circuit board carrier in the vertical dimension, with the ASIC chip also mounted on the carrier. This vertical arrangement in the Z-direction allows multiple chips to occupy overlapping footprint areas, dramatically reducing the horizontal area and overall volume of the sensor arrangement while preserving all necessary electrical connections.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Stability of the object's composition

If chips are mounted in traditional housings, then mechanical stability is achieved, but the arrangement becomes excessively large

Engineering Contradiction:
Improvemechanical stabilityVSAvoidsensor arrangement volume
Core Design Contradiction:
Stability of the object's compositionVSVolume of moving object

Solution Approach 1:

The patent merges the housing function into the circuit board carrier itself, which provides mechanical support and stability for both the ASIC chip and sensor chip. The carrier acts as a common mounting substrate that mechanically stabilizes the entire arrangement while eliminating the need for additional housing structures, thereby achieving mechanical stability in a compact form factor.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The circuit board carrier performs multiple functions simultaneously: it provides mechanical support and stability for the chips, serves as the mounting substrate for both the ASIC and sensor chips, provides electrical connections through its conductor tracks and contact pads, and acts as the structural foundation for the entire sensor arrangement. This multi-functionality eliminates the need for separate housing components, reducing volume while maintaining mechanical stability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If complex mounting methods like die bonding and bonding wires are used, then reliable electrical connections are achieved, but manufacturing complexity increases

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts and eliminates the traditional housing and its associated complex mounting processes from the sensor arrangement. By mounting the chips directly on the circuit board carrier without separate housings, the manufacturing process is simplified while maintaining reliable electrical connections through direct bonding and interchip connections.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent employs preliminary preparation of the circuit board carrier with pre-formed conductor tracks, contact pads, and mounting structures before chip attachment. The ASIC chip and sensor chip are prepared with their respective connection structures in advance, allowing for streamlined assembly processes that reduce manufacturing complexity while ensuring reliable electrical connections are achieved during the mounting process.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enables a compact, flexible, and thermomechanically stable miniaturized sensor arrangement that can be adapted for different applications, providing protection against environmental influences and mechanical stresses while allowing for efficient integration of multiple sensors.

Implementation Method 1

A suitable adhesion layer is provided for fixing

Methodology Applied
Scientific EffectAdhesion: Adhesive

Implementation Method 2

in particular, solder balls (solder bumps) can be provided

Methodology Applied
Scientific EffectSoldering: Soldering

Implementation Method 3

the semiconductor chip arrangement can be embedded into a molding compound

Methodology Applied
Scientific EffectEmbedding:

Implementation Method 4

a covering layer for protection

Methodology Applied
Scientific EffectPhysical barrier protection: Physical Containment

Data Source

PatentUS8580613B2Semiconductor chip arrangement with sensor chip and manufacturing method
Publication Date: 2013.11.12 INVENSENSE INC
  • US8580613B2 patent drawing
  • US8580613B2 patent drawing
  • US8580613B2 patent drawing

AI summary

On a carrier (1) an adhesion layer (4), an ASIC chip (2) and a sensor chip (3) are arranged one above another. An interchip connection (5) is provided for electrically connecting the chips among one another, and an ASIC connection (6) is provided for externally electrically connecting the circuit integrated in the ASIC chip.