Semiconductor Chip Assemblies with Compensation Laminae

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Solution Overview

Problem

Current semiconductor arrangements with press pack cells have complex constructions that complicate the electrical connection of semiconductor chips to terminal contacts, leading to a need for an improved design and production method.

Innovation Solution

A semiconductor arrangement featuring top and bottom contact plates with chip assemblies, where each assembly includes a semiconductor chip with top and bottom main electrodes connected via conductive compensation laminae and connecting layers, allowing for cohesive and electrical connections, and a method for producing these assemblies involving a carrier, embedding compound, and processing steps to form a solid composite that can be singulated into individual chip assemblies.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If complex construction is used to electrically connect semiconductor chips to terminal contacts, then electrical connection reliability is improved, but device complexity increases

Engineering Contradiction:

Improveelectrical connection reliabilityVSAvoidconstruction complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The invention divides the compensation lamina into multiple segments (first, second, third, and fourth compensation laminae) positioned at different locations around the semiconductor chip. Each segment independently compensates for dimensional changes in specific regions, allowing the system to maintain electrical connection reliability while reducing overall construction complexity by distributing the compensation function across simpler, modular components.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The compensation laminae are nested between the semiconductor chip and the contact plates, with connecting layers positioned between the laminae and the electrodes. This nested arrangement allows multiple functional layers to be integrated in a compact configuration, improving electrical connection reliability without proportionally increasing device complexity.

Inventive Principle:

Principle #7Nested doll (Nesting)

2Stability of the object's composition

If cohesive connection is used between main electrode and compensation lamina, then connection stability is improved, but manufacturing complexity increases

Engineering Contradiction:

Improveconnection stabilityVSAvoidmanufacturing complexity

Core Design Contradiction:

Stability of the object's compositionVSEase of manufacture

Solution Approach 1:

The connecting layers are applied to the main electrodes and compensation laminae before assembly, establishing cohesive connections in advance. This preliminary action ensures connection stability is achieved during manufacturing without requiring complex post-assembly processes, thereby improving ease of manufacture while maintaining connection stability.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The connecting layers serve as intermediary materials between the main electrodes and compensation laminae, providing cohesive connection through their adhesive properties. This intermediary approach simplifies manufacturing by enabling straightforward lamination processes while ensuring stable connections, resolving the contradiction between connection stability and manufacturing ease.

Inventive Principle:

Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution enables reliable electrical and mechanical contact, prevents damage to the semiconductor chips, and allows for the selection of chip assemblies based on specific criteria like thickness, resistance, and switching speed, ensuring uniform operation and efficient heat distribution within the semiconductor arrangement.

Implementation Method 1

each of the chip assemblies has a dielectric embedding compound, which encloses the semiconductor chip laterally circumferentially in a ring-shaped fashion

Methodology Applied

Scientific EffectPhysical containment: Physical Containment

Implementation Method 2

An electrically conductive top compensation lamina is in each case arranged on the side of the top main electrode facing away from the semiconductor body and is cohesively and electrically conductively connected to the top main electrode by means of a top connecting layer

Methodology Applied

Scientific EffectCohesive connection: Cohesion

Data Source

PatentUS9984928B2Method for producing a number of chip assemblies and method for producing a semiconductor arrangement

Publication Date: 2018.05.29 INFINEON TECHNOLOGIES AG

AI summary

Method for producing chip assemblies that include semiconductor chip arrangements, each semiconductor chip arrangement including a semiconductor chip having a semiconductor body with a top side and an underside, a top main electrode arranged on the top side, a bottom main electrode arranged on the underside, an electrically conductive top compensation lamina arranged on a side of the top main electrode facing away from the semiconductor body and cohesively and electrically conductively connected to the top main electrode, an electrically conductive bottom compensation lamina arranged on a side of the bottom main electrode facing away from the semiconductor body and cohesively and electrically conductively connected to the bottom main electrode, and a dielectric embedding compound enclosing the semiconductor chip laterally such that the side of the compensation laminae facing away from the semiconductor body are at least not completely covered by the embedding compound.